Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

Extended Eigensolver Functionality

The eigenvalue problems covered are as follows:
  • standard,
    A
    x
    =
    λ
    x
    • A
      complex Hermitian
    • A
      real symmetric
  • generalized,
    A
    x
    =
    λ
    B
    x
    • A
      complex Hermitian,
      B
      Hermitian positive definite (hpd)
    • A
      real symmetric and
      B
      real symmetric positive definite (spd)
The Extended Eigensolver functionality offers:
  • Real/Complex and Single/Double precisions: double precision is recommended to provide better accuracy of eigenpairs.
  • Reverse communication interfaces (RCI) provide maximum flexibility for specific applications. RCI are independent of matrix format and inner system solvers, so you must provide your own linear system solvers (direct or iterative) and matrix-matrix multiply routines.
  • Predefined driver interfaces for dense, LAPACK banded, and sparse (CSR) formats are less flexible but are optimized and easy to use:
    • The Extended Eigensolver interfaces for dense matrices are likely to be slower than the comparable LAPACK routines because the FEAST algorithm has a higher computational cost.
    • The Extended Eigensolver interfaces for banded matrices support banded LAPACK-type storage.
    • The Extended Eigensolver sparse interfaces support compressed sparse row format and use the
      Intel® oneAPI Math Kernel Library
      PARDISO solver.
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804