Developer Reference

  • 0.10
  • 10/21/2020
  • Public Content
Contents

?large

Pre- and post-multiplies a real general matrix with a random orthogonal matrix.

Syntax

void slarge
(
lapack_int
*n
,
float
*a
,
lapack_int
*lda
,
lapack_int
*iseed
,
float
*
work
,
lapack_int
*info
);
void dlarge
(
lapack_int
*n
,
double
*a
,
lapack_int
*lda
,
lapack_int
*iseed
,
double
*
work
,
lapack_int
*info
);
void clarge
(
lapack_int
*n
,
lapack_complex
*a
,
lapack_int
*lda
,
lapack_int
*iseed
,
lapack_complex
*
work
,
lapack_int
*info
);
void zlarge
(
lapack_int
*n
,
lapack_complex_double
*a
,
lapack_int
*lda
,
lapack_int
*iseed
,
lapack_complex_double
*
work
,
lapack_int
*info
);
Include Files
  • mkl.h
Description
The routine
?large
pre- and post-multiplies a general
n
-by-
n
matrix
A
with a random orthogonal or unitary matrix:
A
=
U
*
D
*
U
T
.
Input Parameters
n
The order of the matrix
A
.
n
0
a
Array, size
lda
by
n
.
On entry, the original
n
-by-
n
matrix
A
.
lda
The leading dimension of the array
a
.
lda
n
.
iseed
Array, size 4.
On entry, the seed of the random number generator. The array elements must be between 0 and 4095, and
iseed
[3]
must be odd.
work
Workspace array, size 2*
n
.
Output Parameters
a
On exit,
A
is overwritten by
U
*
A
*
U
'
for some random orthogonal matrix
U
.
iseed
On exit, the seed is updated.
info
If
info
= 0
, the execution is successful.
If
info
< 0
, the
i
-th parameter had an illegal value.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804