Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

?lartgs

Generates a plane rotation designed to introduce a bulge in implicit QR iteration for the bidiagonal SVD problem.

Syntax

lapack_int
LAPACKE_slartgs
(
float
x
,
float
y
,
float
sigma
,
float
*
cs
,
float
*
sn
);
lapack_int
LAPACKE_dlartgs
(
double
x
,
double
y
,
double
sigma
,
double
*
cs
,
double
*
sn
);
Include Files
  • mkl.h
Description
The routine generates a plane rotation designed to introduce a bulge in Golub-Reinsch-style implicit QR iteration for the bidiagonal SVD problem.
x
and
y
are the top-row entries, and
sigma
is the shift. The computed
cs
and
sn
define a plane rotation that satisfies the following:
Equation
with
r
nonnegative.
If
x
2
-
sigma
and
x
*
y
are 0, the rotation is by
π
/2
Input Parameters
A
<datatype>
placeholder, if present, is used for the C interface data types in the C interface section above. See C Interface Conventions for the C interface principal conventions and type definitions.
x
,
y
The (1,1) and (1,2) entries of an upper bidiagonal matrix, respectively.
sigma
Shift
Output Parameters
cs
The cosine of the rotation.
sn
The sine of the rotation.
Return Values
If
info
= 0
, the execution is successful.
If
info
= - 1
,
x
is NaN.
If
info
= - 2
,
y
is NaN.
If
info
= - 3
,
sigma
is NaN.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804