Developer Reference

  • 0.10
  • 10/21/2020
  • Public Content
Contents

?lasd5

Computes the square root of the
i
-th eigenvalue of a positive symmetric rank-one modification of a 2-by-2 diagonal matrix.Used by
?bdsdc
.

Syntax

void slasd5
(
lapack_int
*i
,
float
*d
,
float
*z
,
float
*delta
,
float
*rho
,
float
*dsigma
,
float
*work
);
void dlasd5
(
lapack_int
*i
,
double
*d
,
double
*z
,
double
*delta
,
double
*rho
,
double
*dsigma
,
double
*work
);
Include Files
  • mkl.h
Description
The routine computes the square root of the
i
-th eigenvalue of a positive symmetric rank-one modification of a 2-by-2 diagonal matrix
diag(
d
)*diag(
d
)+
rho
*
Z
*
Z
T
The diagonal entries in the array
d
must satisfy
0 ≤
d
(i) <
d
(j)
for
i<i
,
rho
mustbe greater than 0, and that the Euclidean norm of the vector
Z
is equal to 1.
Input Parameters
i
The index of the eigenvalue to be computed.
i
= 1
or
i
= 2
.
d
Array,
dimension
(2 ).
The original eigenvalues,
0 ≤
d
(1) <
d
(2)
.
z
Array,
dimension
( 2 ).
The components of the updating vector.
rho
The scalar in the symmetric updating formula.
work
Workspace array,
dimension
( 2 ). Contains (
d
(
j
) +
sigma_i
) in its
j
-th component.
Output Parameters
delta
Array,
dimension
( 2 ).
Contains (
d
(
j
) -
sigma_i
) in its
j
-th component. The vector
delta
contains the information necessary to construct the eigenvectors.
dsigma
The computed
sigma_i
, the
i
-th updated eigenvalue.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804