Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.10
  • 10/21/2020
  • Public Content
Contents

?unmrz

Multiplies a complex matrix by the unitary matrix defined from the factorization formed by
?tzrzf
.

Syntax

lapack_int
LAPACKE_cunmrz
(
int
matrix_layout
,
char
side
,
char
trans
,
lapack_int
m
,
lapack_int
n
,
lapack_int
k
,
lapack_int
l
,
const
lapack_complex_float
*
a
,
lapack_int
lda
,
const
lapack_complex_float
*
tau
,
lapack_complex_float
*
c
,
lapack_int
ldc
);
lapack_int
LAPACKE_zunmrz
(
int
matrix_layout
,
char
side
,
char
trans
,
lapack_int
m
,
lapack_int
n
,
lapack_int
k
,
lapack_int
l
,
const
lapack_complex_double
*
a
,
lapack_int
lda
,
const
lapack_complex_double
*
tau
,
lapack_complex_double
*
c
,
lapack_int
ldc
);
Include Files
  • mkl.h
Description
The routine multiplies a complex
m
-by-
n
 matrix
C
 by
Q
 or
Q
H
, where
Q
 is the unitary matrix defined as a product of
k
 elementary reflectors
H
(
i
)
:
Q
 =
H
(1)
H
*
H
(2)
H
*...*
H
(
k
)
H
 as returned by the factorization routine tzrzf.
Depending on the parameters
side
 and
trans
, the routine can form one of the matrix products
Q*C
,
Q
H
*C
,
C*Q
, or
C*Q
H
 (overwriting the result over
C
).
The matrix
Q
 is of order
m
 if
side
 =
'L'
 and of order
n
 if
side
 =
'R'
.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
side
Must be either
'L'
 or
'R'
.
If
side
 =
'L'
,
Q
 or
Q
H
 is applied to
C
 from the left.
If
side
 =
'R'
,
Q
 or
Q
H
 is applied to
C
 from the right.
trans
Must be either
'N'
 or
'C'
.
If
trans
 =
'N'
, the routine multiplies
C
 by
Q
.
If
trans
 =
'C'
, the routine multiplies
C
 by
Q
H
.
m
The number of rows in the matrix
C
 (
m
≥
 0
).
n
The number of columns in
C
 (
n
≥
 0
).
k
The number of elementary reflectors whose product defines the matrix
Q
. Constraints:
0
≤
k
≤
m
, if
side
 =
'L'
;
0
≤
k
≤
n
, if
side
 =
'R'
.
l
The number of columns of the matrix
A
 containing the meaningful part of the Householder reflectors. Constraints:
0
≤
l
≤
m
, if
side
 =
'L'
;
0
≤
l
≤
n
, if
side
 =
'R'
.
a
,
tau
,
c
Arrays:
a
(size for
side
 = 'L': max(1,
lda
*
m
) for column major layout and max(1,
lda
*
k
) for row major layout; for
side
 = 'R': max(1,
lda
*
b
) for column major layout and max(1,
lda
*
k
) for row major layout),
tau
,
c
 (size max(1,
ldc
*
n
) for column major layout and max(1,
ldc
*
m
) for row major layout).
On entry, the
i
th row of
a
 must contain the vector which defines the elementary reflector
H
(
i
)
, for i = 1,2,...,
k
, as returned by
ctzrzf
/
ztzrzf
 in the last
k
 rows of its array argument
a
.
tau
[
i
 - 1]
 must contain the scalar factor of the elementary reflector
H
(
i
)
, as returned by
ctzrzf
/
ztzrzf
.
The size of
tau
 must be at least max(1,
k
).
c
 contains the
m
-by-
n
 matrix
C
.
lda
The leading dimension of
a
;
lda
≥
 max(1,
k
)
for column major layout. For row major layout,
lda
≥
 max(1,
m
)
 if
side
 = 'L', and
lda
≥
 max(1,
n
)
 if
side
 = 'R'
.
ldc
The leading dimension of
c
;
ldc
≥
 max(1,
m
)
for column major layout and max(1,
n
) for row major layout
.
Output Parameters
c
Overwritten by the product
Q*C
,
Q
H
*C
,
C*Q
, or
C*Q
H
 (as specified by
side
 and
trans
).
Return Values
This function returns a value
info
.
If
info
=0
, the execution is successful.
If
info
 =
-i
, the
i
-th parameter had an illegal value.
Application Notes
The real counterpart of this routine is ormrz.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804