Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

?sbgv

Computes all eigenvalues and, optionally, eigenvectors of a real generalized symmetric definite eigenproblem with banded matrices.

Syntax

lapack_int
LAPACKE_ssbgv
(
int
matrix_layout
,
char
jobz
,
char
uplo
,
lapack_int
n
,
lapack_int
ka
,
lapack_int
kb
,
float
*
ab
,
lapack_int
ldab
,
float
*
bb
,
lapack_int
ldbb
,
float
*
w
,
float
*
z
,
lapack_int
ldz
);
lapack_int
LAPACKE_dsbgv
(
int
matrix_layout
,
char
jobz
,
char
uplo
,
lapack_int
n
,
lapack_int
ka
,
lapack_int
kb
,
double
*
ab
,
lapack_int
ldab
,
double
*
bb
,
lapack_int
ldbb
,
double
*
w
,
double
*
z
,
lapack_int
ldz
);
Include Files
  • mkl.h
Description
The routine computes all the eigenvalues, and optionally, the eigenvectors of a real generalized symmetric-definite banded eigenproblem, of the form
A
*
x
 =
λ
*
B
*
x
. Here
A
 and
B
 are assumed to be symmetric and banded, and
B
 is also positive definite.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
jobz
Must be
'N'
 or
'V'
.
If
jobz
 =
'N'
, then compute eigenvalues only.
If
jobz
 =
'V'
, then compute eigenvalues and eigenvectors.
uplo
Must be
'U'
 or
'L'
.
If
uplo
 =
'U'
, arrays
ab
 and
bb
 store the upper triangles of
A
 and
B
;
If
uplo
 =
'L'
, arrays
ab
 and
bb
 store the lower triangles of
A
 and
B
.
n
The order of the matrices
A
 and
B
 (
n
≥
 0
).
ka
The number of super- or sub-diagonals in
A
(
ka
≥
 0
).
kb
The number of super- or sub-diagonals in
B
 (
kb
≥
 0).
ab
,
bb
Arrays:
ab
(size at least max(1,
ldab
*
n
) for column major layout and max(1,
ldab
*(
ka
 + 1)) for row major layout)
 is an array containing either upper or lower triangular part of the symmetric matrix
A
 (as specified by
uplo
) in band storage format.
bb
(size at least max(1,
ldbb
*
n
) for column major layout and max(1,
ldbb
*(
kb
 + 1)) for row major layout)
 is an array containing either upper or lower triangular part of the symmetric matrix
B
 (as specified by
uplo
) in band storage format.
ldab
The leading dimension of the array
ab
; must be at least
ka
+1
for column major layout and at least max(1,
n
) for row major layout
 .
ldbb
The leading dimension of the array
bb
; must be at least
kb
+1
for column major layout and at least max(1,
n
) for row major layout
.
ldz
The leading dimension of the output array
z
;
ldz
≥
 1
. If
jobz
 =
'V'
,
ldz
≥
 max(1,
n
)
.
Output Parameters
ab
On exit, the contents of
ab
 are overwritten.
bb
On exit, contains the factor
S
 from the split Cholesky factorization
B
 =
S
T
*S
, as returned by pbstf/pbstf.
w
,
z
Arrays:
w
, size at least max(1,
n
).
If
info
 = 0
, contains the eigenvalues in ascending order.
z
(size at least max(1,
ldz
*
n
))
 .
If
jobz
 =
'V'
, then if
info
 = 0
,
z
 contains the matrix
Z
 of eigenvectors, with the
i
-th column of
z
 holding the eigenvector associated with
w
(
i
). The eigenvectors are normalized so that
Z
T
*B
*
Z
 = I
.
If
jobz
 =
'N'
, then
z
 is not referenced.
Return Values
This function returns a value
info
.
If
info
=0
, the execution is successful.
If
info
 =
-i
, the
i
-th parameter had an illegal value.
If
info
 > 0
, and
if
i
≤
n
, the algorithm failed to converge, and
i
 off-diagonal elements of an intermediate tridiagonal did not converge to zero;
if
info
 =
n
 +
i
, for
1
≤
i
≤
n
, then pbstf/pbstf returned
info
 =
i
 and
B
 is not positive-definite. The factorization of
B
 could not be completed and no eigenvalues or eigenvectors were computed.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804