Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

?sytri_3

Computes the inverse of a real or complex symmetric matrix.
lapack_int
LAPACKE_ssytri_3
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
float
*
A
,
lapack_int
lda
,
const
float
*
e
,
const
lapack_int
*
ipiv
);
lapack_int
LAPACKE_dsytri_3
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
double
*
A
,
lapack_int
lda
,
const
double
*
e
,
const
lapack_int
*
ipiv
);
lapack_int
LAPACKE_csytri_3
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
lapack_complex_float
*
A
,
lapack_int
lda
,
const
lapack_complex_float
*
e
,
const
lapack_int
*
ipiv
);
lapack_int
LAPACKE_zsytri_3
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
lapack_complex_double
*
A
,
lapack_int
lda
,
const
lapack_complex_double
*
e
,
const
lapack_int
*
ipiv
);
Description
?sytri_3
 computes the inverse of a real or complex symmetric matrix A using the factorization computed by
?sytrf_rk
: A = P*U*D*(U
T
)*(P
T
) or A = P*L*D*(L
T
)*(P
T
), where U (or L) is a unit upper (or lower) triangular matrix, U
T
 (or L
T
) is the transpose of U (or L), P is a permutation matrix, P
T
 is the transpose of P, and D is symmetric and block diagonal with 1-by-1 and 2-by-2 diagonal blocks.
?sytri_3
 sets the leading dimension of the workspace before calling
?sytri_3x
, which actually computes the inverse. This is the blocked version of the algorithm, calling Level-3 BLAS.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
uplo
Specifies whether the details of the factorization are stored as an upper or lower triangular matrix.
  • =
    'U'
    : The upper triangle of A is stored.
  • =
    'L'
    : The lower triangle of A is stored.
n
The order of the matrix A.
n
 ≥ 0.
A
Array of size max(1,
lda
*
n
).
 On entry, diagonal of the block diagonal matrix D and factors U or L as computed by
?sytrf_rk
:
  • Only
     diagonal elements of the symmetric block diagonal matrix D on the diagonal of A; that is, D(
    k
    ,
    k
    ) = A(
    k
    ,
    k
    ). Superdiagonal (or subdiagonal) elements of D should be provided on entry in array
    e
    .
    —and—
  • If
    uplo
     =
    'U'
    , factor U in the superdiagonal part of A. If
    uplo
     =
    'L'
    , factor L in the subdiagonal part of A.
lda
The leading dimension of the array
A
.
e
Array of size
n
.
 On entry, contains the superdiagonal (or subdiagonal) elements of the symmetric block diagonal matrix D with 1-by-1 or 2-by-2 diagonal blocks. If
uplo
 =
'U'
, e(
i
) = D(
i
-
1,
i
),
i
=2:N, and e(1) is not referenced. If
uplo
 =
'L'
, e(
i
) = D(
i
+1,
i
),
i
=1:N
-
1, and e(
n
) is not referenced.
For 1-by-1 diagonal block D(
k
), where 1 ≤ k ≤
n
, the element
e
[
k
-
1] is not referenced in both the
uplo
 =
'U'
 and
uplo
 =
'L'
 cases.
ipiv
Array of size
n
.
 Details of the interchanges and the block structure of D as determined by
?sytrf_rk
.
Output Parameters
A
On exit, if
info
 = 0, the symmetric inverse of the original matrix. If
uplo
 =
'U'
, the upper triangular part of the inverse is formed and the part of A below the diagonal is not referenced. If
uplo
 =
'L'
, the lower triangular part of the inverse is formed and the part of A above the diagonal is not referenced.
Return Values
This function returns a value
info
.
= 0: Successful exit.
< 0: If
info
 =
-
i
, the
i
th
 argument had an illegal value.
> 0: If
info
 =
i
, D(
i
,
i
) = 0; the matrix is singular and its inverse could not be computed.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804