Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

?getrs

Solves a system of linear equations with an LU-factored square coefficient matrix, with multiple right-hand sides.

Syntax

lapack_int
LAPACKE_sgetrs
(
int
matrix_layout
,
char
trans
,
lapack_int
n
,
lapack_int
nrhs
,
const
float
*
a
,
lapack_int
lda
,
const
lapack_int
*
ipiv
,
float
*
b
,
lapack_int
ldb
);
lapack_int
LAPACKE_dgetrs
(
int
matrix_layout
,
char
trans
,
lapack_int
n
,
lapack_int
nrhs
,
const
double
*
a
,
lapack_int
lda
,
const
lapack_int
*
ipiv
,
double
*
b
,
lapack_int
ldb
);
lapack_int
LAPACKE_cgetrs
(
int
matrix_layout
,
char
trans
,
lapack_int
n
,
lapack_int
nrhs
,
const
lapack_complex_float
*
a
,
lapack_int
lda
,
const
lapack_int
*
ipiv
,
lapack_complex_float
*
b
,
lapack_int
ldb
);
lapack_int
LAPACKE_zgetrs
(
int
matrix_layout
,
char
trans
,
lapack_int
n
,
lapack_int
nrhs
,
const
lapack_complex_double
*
a
,
lapack_int
lda
,
const
lapack_int
*
ipiv
,
lapack_complex_double
*
b
,
lapack_int
ldb
);
Include Files
  • mkl.h
Description
The routine solves for
X
 the following systems of linear equations:
A*X
 =
B
if
trans
=
'N'
,
A
T
*X
 =
B
if
trans
=
'T'
,
A
H
*X
 =
B
if
trans
=
'C'
 (for complex matrices only).
Before calling this routine, you must call
?getrf
 to compute the
LU
 factorization of
A
.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
trans
Must be
'N'
 or
'T'
 or
'C'
.
Indicates the form of the equations:
If
trans
 =
'N'
, then
A*X
 =
B
 is solved for
X
.
If
trans
 =
'T'
, then
A
T
*X
 =
B
 is solved for
X
.
If
trans
 =
'C'
, then
A
H
*X
 =
B
 is solved for
X
.
n
The order of
A
; the number of rows in
B
(
n
≥
 0)
.
nrhs
The number of right-hand sides;
nrhs
≥
 0.
a
Array of size max(1,
lda
*
n
).
The array
a
 contains
LU
 factorization of matrix
A
 resulting from the call of
?getrf
.
b
Array of size max(1,
ldb
*
nrhs
) for column major layout, and max(1,
ldb
*
n
) for row major layout.
The array
b
 contains the matrix
B
 whose columns are the right-hand sides for the systems of equations.
lda
The leading dimension of
a
;
lda
≥
 max(1,
n
)
.
ldb
The leading dimension of
b
;
ldb
≥
 max(1,
n
) for column major layout and
ldb
≥
nrhs
 for row major layout
.
ipiv
Array, size at least
max(1,
n
)
. The
ipiv
 array, as returned by
?getrf
.
Output Parameters
b
Overwritten by the solution matrix
X
.
Return Values
This function returns a value
info
.
If
info
 = 0
, the execution is successful.
If
info
 =
-i
, parameter
i
 had an illegal value.
Application Notes
For each right-hand side
b
, the computed solution is the exact solution of a perturbed system of equations
(
A
 +
E
)
x
 =
b
, where 
|E| ≤ c(n)ε P|L||U|
c
(
n
)
 is a modest linear function of
n
, and
ε
 is the machine precision.
If
x
0
 is the true solution, the computed solution
x
 satisfies this error bound:
Equation
where
cond(
A
,
x
)= || |
A
-1
||
A
| |
x
| ||
∞
 / ||
x
||
∞
≤
 ||
A
-1
||
∞
 ||
A
||
∞
 =
κ
∞
(
A
)
.
Note that
cond(
A
,
x
)
 can be much smaller than
κ
∞
(
A
)
; the condition number of
A
T
 and
A
H
 might or might not be equal to
κ
∞
(
A
)
.
The approximate number of floating-point operations for one right-hand side vector
b
 is
2
n
2
 for real flavors and
8
n
2
 for complex flavors.
To estimate the condition number
κ
∞
(
A
)
, call
?gecon
.
To refine the solution and estimate the error, call
?gerfs
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804