Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.10
  • 10/21/2020
  • Public Content
Contents

?tptrs

Solves a system of linear equations with a packed triangular coefficient matrix, with multiple right-hand sides.

Syntax

lapack_int
LAPACKE_stptrs
(
int
matrix_layout
,
char
uplo
,
char
trans
,
char
diag
,
lapack_int
n
,
lapack_int
nrhs
,
const
float
*
ap
,
float
*
b
,
lapack_int
ldb
);
lapack_int
LAPACKE_dtptrs
(
int
matrix_layout
,
char
uplo
,
char
trans
,
char
diag
,
lapack_int
n
,
lapack_int
nrhs
,
const
double
*
ap
,
double
*
b
,
lapack_int
ldb
);
lapack_int
LAPACKE_ctptrs
(
int
matrix_layout
,
char
uplo
,
char
trans
,
char
diag
,
lapack_int
n
,
lapack_int
nrhs
,
const
lapack_complex_float
*
ap
,
lapack_complex_float
*
b
,
lapack_int
ldb
);
lapack_int
LAPACKE_ztptrs
(
int
matrix_layout
,
char
uplo
,
char
trans
,
char
diag
,
lapack_int
n
,
lapack_int
nrhs
,
const
lapack_complex_double
*
ap
,
lapack_complex_double
*
b
,
lapack_int
ldb
);
Include Files
  • mkl.h
Description
The routine solves for
X
 the following systems of linear equations with a packed triangular matrix
A
, with multiple right-hand sides stored in
B
:
A*X
 =
B
if
trans
=
'N'
,
A
T
*X
 =
B
if
trans
=
'T'
,
A
H
*X
 =
B
if
trans
=
'C'
 (for complex matrices only).
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
uplo
Must be
'U'
 or
'L'
.
Indicates whether
A
 is upper or lower triangular:
If
uplo
 =
'U'
, then
A
 is upper triangular.
If
uplo
 =
'L'
, then
A
 is lower triangular.
trans
Must be
'N'
 or
'T'
 or
'C'
.
If
trans
 =
'N'
, then
A*X
 =
B
 is solved for
X
.
If
trans
 =
'T'
, then
A
T
*X
 =
B
 is solved for
X
.
If
trans
 =
'C'
, then
A
H
*X
 =
B
 is solved for
X
.
diag
Must be
'N'
 or
'U'
.
If
diag
 =
'N'
, then
A
 is not a unit triangular matrix.
If
diag
 =
'U'
, then
A
 is unit triangular: diagonal elements are assumed to be 1 and not referenced in the array
ap
.
n
The order of
A
; the number of rows in
B
;
n
≥
 0.
nrhs
The number of right-hand sides;
nrhs
≥
 0.
ap
The dimension of array
ap
 must be at least max(1,
n
(
n
+1)/2). The array
ap
 contains the matrix
A
 in packed storage (see Matrix Storage Schemes).
b
The array
b
 contains the matrix
B
 whose columns are the right-hand sides for the system of equations.
The size of
b
 is max(1,
ldb
*
nrhs
) for column major layout and max(1,
ldb
*
n
) for row major layout.
ldb
The leading dimension of
b
;
ldb
≥
 max(1,
n
) for column major layout and
ldb
≥
nrhs
 for row major layout
.
Output Parameters
b
Overwritten by the solution matrix
X
.
Return Values
This function returns a value
info
.
If
info
=0
, the execution is successful.
If
info
 =
-i
, parameter
i
 had an illegal value.
Application Notes
For each right-hand side
b
, the computed solution is the exact solution of a perturbed system of equations
(
A
 +
E
)
x
 =
b
, where 
|E| ≤ c(n)ε |A|
c
(
n
)
 is a modest linear function of
n
, and
ε
 is the machine precision.
If
x
0
 is the true solution, the computed solution
x
 satisfies this error bound:
Equation
where
cond(
A
,
x
)
= || |
A
-1
||
A
| |
x
| ||
∞
 / ||
x
||
∞
≤
 ||
A
-1
||
∞
 ||
A
||
∞
 =
κ
∞
(
A
).
Note that
cond(
A
,
x
)
 can be much smaller than
κ
∞
(
A
)
; the condition number of
A
T
 and
A
H
 might or might not be equal to
κ
∞
(
A
)
.
The approximate number of floating-point operations for one right-hand side vector
b
 is
n
2
 for real flavors and
4
n
2
 for complex flavors.
To estimate the condition number
κ
∞
(
A
)
, call
?tpcon
.
To estimate the error in the solution, call
?tprfs
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804