Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.10
  • 10/21/2020
  • Public Content
Contents

ScaLAPACK Routines

Intel® oneAPI
 Math Kernel Library
 implements routines from the ScaLAPACK package for distributed-memory architectures. Routines are supported for both real and complex dense and band matrices to perform the tasks of solving systems of linear equations, solving linear least-squares problems, eigenvalue and singular value problems, as well as performing a number of related computational tasks.
Intel® oneAPI Math Kernel Library
 ScaLAPACK routines are written in FORTRAN 77 with exception of a few utility routines written in C to exploit the IEEE arithmetic. All routines are available in all precision types: single precision, double precision, complexm, and double complex precision. See the
mkl_scalapack.h
 header file for C declarations of ScaLAPACK routines.
ScaLAPACK routines are provided only for Intel® 64 or Intel® Many Integrated Core architectures.
See descriptions of ScaLAPACK computational routines that perform distinct computational tasks, as well as driver routinesfor solving standard types of problems in one call. Additionally,
Intel® oneAPI
 Math Kernel Library
 implements ScaLAPACKAuxiliary Routines, Utility Functions and Routines, and Matrix Redistribution/Copy Routines. The library includes routines for both real and complex data.
The
<install_directory>
/examples/scalapackf
 directory contains sample code demonstrating the use of ScaLAPACK routines.
Generally, ScaLAPACK runs on a network of computers using MPI as a message-passing layer and a set of prebuilt communication subprograms (BLACS), as well as a set of BLAS optimized for the target architecture.
Intel® oneAPI Math Kernel Library
 version of ScaLAPACK is optimized for Intel® processors. For the detailed system and environment requirements, see
Intel® oneAPI Math Kernel Library
 Release Notes
 and
Intel® oneAPI Math Kernel Library
 Developer Guide
.
For full reference on ScaLAPACK routines and related information, see [SLUG].
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804