Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

p?lared1d

Redistributes an array assuming that the input array,
bycol
, is distributed across rows and that all process columns contain the same copy of
bycol
.

Syntax

void
pslared1d
(
MKL_INT
*n
,
MKL_INT
*ia
,
MKL_INT
*ja
,
MKL_INT
*desc
,
float
*bycol
,
float
*byall
,
float
*work
,
MKL_INT
*lwork
);
void
pdlared1d
(
MKL_INT
*n
,
MKL_INT
*ia
,
MKL_INT
*ja
,
MKL_INT
*desc
,
double
*bycol
,
double
*byall
,
double
*work
,
MKL_INT
*lwork
);
Include Files
  • mkl_scalapack.h
Description
The
p?lared1d
function
redistributes a 1D array. It assumes that the input array
bycol
is distributed across rows and that all process column contain the same copy of
bycol
. The output array
byall
is identical on all processes and contains the entire array.
Input Parameters
np
= Number of local rows in
bycol
()
n
(global)
The number of elements to be redistributed.
n
0
.
ia
,
ja
(global)
ia
,
ja
must be equal to 1.
desc
(local) array of size 9. A 2D array descriptor, which describes
bycol
.
bycol
(local).
Distributed block cyclic array of global size
n
and of local size
np
.
bycol
is distributed across the process rows. All process columns are assumed to contain the same value.
work
(local).
size
lwork
. Used to hold the buffers sent from one process to another.
lwork
(local)
The size of the
work
array.
lwork
numroc
(
n
,
desc
[
nb_
]
, 0, 0,
npcol
)
.
Output Parameters
byall
(global).
Global size
n
, local size
n
.
byall
is exactly duplicated on all processes. It contains the same values as
bycol
, but it is replicated across all processes rather than being distributed.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804