Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

sparse_matrix_checker_init

Initializes handle for sparse matrix checker.

Syntax

void
sparse_matrix_checker_init
(
sparse_struct*
handle
);
Include Files
  • mkl.h
Description
The
sparse_matrix_checker_init
routine initializes the handle for the
sparse_matrix_checker
routine. The
handle
variable contains this data:
Description of
sparse_matrix_checker
handle
Data
Field
Type
Possible Values
Meaning
n
MKL_INT
Order of the matrix stored in sparse array.
csr_ia
MKL_INT*
Pointer to
ia
array for
matrix_format
=
MKL_CSR
csr_ja
MKL_INT*
Pointer to
ja
array for
matrix_format
=
MKL_CSR
check_result
[3]
MKL_INT
See Sparse Matrix Checker Error Values for a description of the values returned in
check_result
.
Indicates location of problem in array when
message_level
=
MKL_NO_PRINT
.
indexing
sparse_matrix_indexing
MKL_ZERO_BASED
MKL_ONE_BASED
Indexing style used in array.
matrix_structure
sparse_matrix_structures
MKL_GENERAL_STRUCTURE
MKL_UPPER_TRIANGULAR
MKL_LOWER_TRIANGULAR
MKL_STRUCTURAL_SYMMETRIC
Type of sparse matrix stored in array.
matrix_format
sparse_matrix_formats
MKL_CSR
Format of array used for sparse matrix storage.
message_level
sparse_matrix_message_levels
MKL_NO_PRINT
MKL_PRINT
Determines whether or not feedback is provided on the screen.
print_style
sparse_matrix_print_styles
MKL_C_STYLE
MKL_FORTRAN_STYLE
Determines style of messages when
message_level
=
MKL_PRINT
.
Input Parameters
handle
Pointer to the data structure describing the sparse array to check.
Output Parameters
handle
Pointer to the initialized data structure.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804