Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

VM Data Types, Accuracy Modes, and Performance Tips

VM includes mathematical and pack/unpack vector functions for single and double precision vector arguments of real and compex types.
Intel® oneAPI Math Kernel Library
 provides Fortran and C interfaces for all VM functions, including the associated service functions. The Function Naming Conventions
topic
shows how to call these functions.
Performance depends on a number of factors, including vectorization and threading overhead. The recommended usage is as follows:
  • Use VM for vector lengths larger than 40 elements.
  • Use the Intel® Compiler for vector lengths less than 40 elements.
All VM vector functions support the following accuracy modes:
  • High Accuracy (HA), the default mode
  • Low Accuracy (LA), which improves performance by reducing accuracy of the two least significant bits
  • Enhanced Performance (EP), which provides better performance at the cost of significantly reduced accuracy. Approximately half of the bits in the mantissa are correct.
Note that using the EP mode does not guarantee accurate processing of corner cases and special values. Although the default accuracy is HA, LA is sufficient in most cases. For applications that require less accuracy (for example, media applications, some Monte Carlo simulations, etc.), the EP mode may be sufficient.
VM handles special values in accordance with the C99 standard [C99].
Intel® oneAPI Math Kernel Library
 offers both functions and environment variables to switch between modes for VM. See the
Intel® oneAPI Math Kernel Library
 Developer Guide
 for details about the environment variables. Use the
vmlSetMode
(
mode
)
 function to switch between the HA, LA, and EP modes. The
vmlGetMode()
 function returns the current mode.
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804