Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

v?ErfcInv

Computes the inverse complementary error function value of vector elements.

Syntax

vsErfcInv
(
n
,
a
,
y
)
;
vsErfcInvI(n, a, inca, y, incy);
vmsErfcInv
(
n
,
a
,
y
,
mode
)
;
vmsErfcInvI(n, a, inca, y, incy, mode);
vdErfcInv
(
n
,
a
,
y
)
;
vdErfcInvI(n, a, inca, y, incy);
vmdErfcInv
(
n
,
a
,
y
,
mode
)
;
vmdErfcInvI(n, a, inca, y, incy, mode);
Include Files
  • mkl.h
Input Parameters
Name
Type
Description
n
const MKL_INT
Specifies the number of elements to be calculated.
a
const float*
for
vsErfcInv
,
vmsErfcInv
const double*
for
vdErfcInv
,
vmdErfcInv
Pointer to an array that contains the input vector
a
.
inca
,
incy
const MKL_INT
Specifies increments for the elements of
a
and
y
.
mode
const MKL_INT64
Overrides global VM mode setting for this function call. See
vmlSetMode
for possible values and their description.
Output Parameters
Name
Type
Description
y
float*
for
vsErfcInv
,
vmsErfcInv
double*
for
vdErfcInv
,
vmdErfcInv
Pointer to an array that contains the output vector
y
.
Description
The
ErfcInv
function computes the inverse complimentary error function values for elements of the input vector
a
and writes them to the output vector
y
.
The inverse complementary error function is defined as given by:
Equation
Equation
Equation
where
erf(x)
denotes the error function and
erfinv(x)
denotes the inverse error function.
See also Figure
"ErfInv Family Functions Relationship"
in
ErfInv
function description for
ErfcInv
function relationship with the other functions of
ErfInv
family.
Special Values for Real Function
v?ErfcInv(x)
Argument
Result
VM Error Status
Exception
+1
+0
 
 
+2
-
VML_STATUS_SING
ZERODIVIDE
-0
+
VML_STATUS_SING
ZERODIVIDE
+0
+
VML_STATUS_SING
ZERODIVIDE
X < -0
QNAN
VML_STATUS_ERRDOM
INVALID
X > +2
QNAN
VML_STATUS_ERRDOM
INVALID
+
QNAN
VML_STATUS_ERRDOM
INVALID
-
QNAN
VML_STATUS_ERRDOM
INVALID
QNAN
QNAN
 
 
SNAN
QNAN
 
INVALID

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804