Running the Intel® Distribution for LINPACK* Benchmark
- Load the necessary environment variables for the Intel MPI Library and Intel® compiler:<compiler directory>/env/vars.sh<mpi directory>/env/vars.sh
- InHPL.dat, set the problem sizeNto 10000. Because this setting is for a test run, the problem size should be small.
- For better performance, enable non-uniform memory access (NUMA) on your system and configure to run an MPI process for each NUMA socket as explained below.High-bandwidth Multi-Channel Dynamic Random Access Memory (MCDRAM) on the second-generation Intel® Xeon® Phi processors may appear to be a NUMA node. However, because there are no CPUs on this node, do not run an MPI process for it.
- Refer to your BIOS settings to enable NUMA on your system.
- Set the following variables at the top of therunme_intel64_dynamicscript according to your cluster configuration:
- The total number of MPI processes.
- The number of MPI processes per each cluster node.
- In theHPL.datfile, set the parametersPsandQsso thatPs*Qsequals the number of MPI processes. For example, for 2 processes, setPsto 1 andQsto 2. Alternatively, leave theHPL.datfile as is and launch with-pand-qcommand-line parameters.
- Rerun the test increasing the size of the problem until the matrix size uses about 80% of the available memory. To do this, either modifyNsin line 6 ofHPL.dator use the-ncommand-line parameter:
- For 16 GB:40000 Ns
- For 32 GB:56000 Ns
- For 64 GB:83000 Ns
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804