Contents of the Intel® Optimized LINPACK Benchmark
The Intel Optimized LINPACK Benchmark for
Linux*
contains the following files, located in the
./
benchmarks
/
linpack
/
subdirectory of the
directory:
File in
./ benchmarks / linpack / | Description
|
|---|---|
x linpack_xeon32 | The 32-bit program executable for a system based on Intel® Xeon® processor or Intel® Xeon® processor MP with or without Intel® Streaming SIMD Extensions 3 (SSE3).
|
x linpack_xeon64 | The 64-bit program executable for a system with Intel Xeon processor using Intel® 64 architecture.
|
runme_xeon32 | A sample shell script for executing a pre-determined problem set for
x linpack_xeon32 .
|
runme_xeon64 | A sample shell script for executing a pre-determined problem set for
x linpack_xeon64 .
|
lininput_xeon32 | Input file for a pre-determined problem for the
runme_xeon32 script.
|
lininput_xeon64 | Input file for a pre-determined problem for the
runme_xeon64 script.
|
help.lpk | Simple help file.
|
xhelp.lpk | Extended help file.
|
These files are not available immediately after installation and appear as a result of execution of an appropriate
runme script.
| |
l in_xeon32.txt | Result of the
runme_xeon32 script execution.
|
l in_xeon64.txt | Result of the
runme_xeon64 script execution.
|
Optimization Notice
|
|---|
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
|
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.