• 04/03/2020
  • Public Content
Contents

OpenVX* Basics

OpenVX* is a new standard from Khronos*, offering a set of optimized primitives for low-level image processing and computer vision primitives. The OpenVX specification provides a way to write code that is portable across multiple vendors and platforms, as well as multiple hardware types.
The OpenVX resource and execution abstractions enable hardware vendors to optimize implementation with a strong focus on a particular platform. At the same time, standardization allows software developers to get started with algorithmic innovations based on high performance vendor implementations without immediately needing to understand all of the details required to optimize for specific hardware.
The graph-based programming interface is intended for creating vision algorithms using graph concepts. The standard defines graph formalities and execution semantics to address the needs of computer vision developers. One of the major advantages of the graph interface is the ability of the underlying implementation to aggressively optimize full vision pipelines instead of specific functions.
Performance portability across diversity of engines like CPUs, GPUs, and fixed function hardware was one of the design goals of the OpenVX specification.
For more details, see the following topics:

Product and Performance Information

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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

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