User and Reference Guide

  • 2020
  • 10/23/2020
  • Public Content
Contents

Launch Trace Capturing

Intel® System Debugger supports the following methods for collecting execution trace:
  • Last Branch Record (LBR) - a register-backed hardware feature with limited jump history.
  • Intel® Processor Trace (Intel® PT) - a feature to that allows you to trace thousands of instructions and provides options for configuring the trace.
To record trace with Intel® System Debugger:
  1. Halt the target and select the desired debug context in the Debug view.
    Each thread uses specific mechanisms for tracing.
  2. Open the Instruction Trace view and click
    show target breakpoints
    Configure Instruction Trace
    .
  3. In the opened dialog box, select the desired method from the
    Trace Type
    drop-down list.
  4. You can filter out kernel or user mode instructions or choose to trace all (default) using radio buttons.
  5. If you have selected the Intel® PT feature, you can further customize trace parameters. Check
    Show Advanced Parameters
    box to expand the dialog.
    1. To specify the search address range, click Add on the right.
    2. In the new dialog box, select the method of defining the address range:
      • Choose to trace instructions belonging to a specific module only. The information on modules currently loaded is displayed in the dialog.
      • Specify the address range manually by entering the values in hexadecimal format.
    3. Click
      OK
      to save changes.
      configure trace
  6. Click
    OK
    to close the configuration dialog and start trace capturing by clicking
    resume
    Start Instruction Trace
    .
  7. Resume the target.
  8. In the Instruction Trace view, click
    terminate
    Stop Instruction Trace
    to view the collected history of instruction calls.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804