User and Reference Guide

  • 2020
  • 10/23/2020
  • Public Content

CPU Operation Modes

When the target is suspended, you can see the CPU operating modes for a particular thread. Select the thread in the Debug view and see the mode information in the status bar at the bottom:
The list below shows available modes:
cpu mode
  • Protected - the native operating mode of the processor.
  • Real (or Real-address) - the mode that provides the programming environment of the Intel 8086 processor with extensions.
  • Virtual86 (or Virtual-8086) - a quasi-operating mode that allows the processor execute 8086 software in a protected, multitasking environment.
  • Compatibility - the IA-32e submodule that allows most legacy protected-mode applications to run unchanged.
  • 64-Bit - the IA-32e submodule that rovides 64-bit linear addressing and support for physical address space larger than 64 GBytes.
  • VMXroot - the mode for VMX root operations for Virtual Machine Monitors (VMM)
  • VMXguest - the mode for VMX non-root operations for the guest software.
  • SMM - System Management Mode that provides an operating system or executive with a transparent mechanism for implementing power management and OEM differentiation features.
For more information on CPU modes, see the Intel® 64 and IA-32 Architectures Software Developer Manual.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804