Intel® System Debugger - System Debug User and Reference Guide

User and Reference Guide

  • 2020
  • 07/29/2020
  • Public Content
Contents

Configuring the Scan for Debug Information

The functionality of
load this
Load Available Debug Symbols (formerly named Load This) is based on scanning the memory for PE/COFF module headers.
The default way of loading debug information by pressing
load this
Load Available Debug Symbols button (see instructions here) implies the following conditions to be true:
  • You want to load the debug information of the module being currently executed.
    This means that the start address for the scanning is the current program counter.
  • Most of modules to be loaded are aligned at the page boundary.
    This means, the default stride equals the page size.
  • Modules to be loaded are not bigger than 4KB.
To load information with custom parameters, launch the
debugger icon
ISD Shell and execute the following command:

   threads[N].symbols.load_this([<start>], [<alignment>], [<search_range>])
where:
  • N
     is the number of a hardware thread
  • start
     points to the address to start scanning for debug information
  • alignment
     defines the scan stride size in bytes
  • search_range
     defines the scan range size in bytes.
All parameters are optional - if you omit them, the default values are used.
For instructions on fixing other issues, see the Troubleshooting section.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804