User and Reference Guide

  • 2020
  • 07/29/2020
  • Public Content
Contents

Registers View

Menu
Window > Show View > Registers
Toolbar
registers view
Registers
The Registers view allows you to explore and edit the contents of the target registers. The view contains two areas:
  • Register tree - displays the hierarchical structure of available registers and details on each instance. If a register contains flags, they are also displayed as nodes of the register.
  • Details pane - displays information on a selected register:
    • Full name of the register.
    • Register value in the following number systems: hexadecimal, decimal, binary, and octal.
    • Register size and permissions.
View Toolbar Options
show type names
Show Type Names
Displays type names of registers.
show logical structure
Show Logical Structure
Displays the logical structure of registers.
collapse all
Collapse All
Collapses all currently expanded register instances in the view.
refresh view
Refresh
Refreshes the view and updates the register tree.
open new view
Open New View
Opens a new Registers view.
pin view
Pin to Debug Context
Pins the selected register to an active debug context displayed in the Debug view.
view menu
View Menu
Provides the following configuration options: +
  • Layout: sets an alternative layout for the view.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804