User Guide

  • 2020
  • 06/18/2020
  • Public Content
Contents

Hardware Events Report

Intel® VTune™
Profiler
counts the number of hardware events during the Hardware Event-based Sampling Collection to help you understand how the application utilizes available hardware resources. Use the
hw-events
report type to display hardware events count per application functions in the descending order by default.
Example
This example generates the
hw-events
report for the specified Hotspots analysis (
hardware event-based sampling
mode).
vtune
-report hw-events -r r001hs
Function Hardware Event Count: Hardware Event Count: Hardware Event Count: Hardware Event Count: Module INST_RETIRED.ANY (K) CPU_CLK_UNHALTED.THREAD (K) CPU_CLK_UNHALTED.REF_TSC (K) BR_INST_RETIRED.NEAR_TAKEN (K) ---------------------------- --------------------- --------------------------- ---------------------------- ------------------------------ ----------------- grid_intersect 11,901,341 16,145,531 17,464,710 1,620,825 analyze_locks sphere_intersect 7,944,651 10,759,847 11,794,832 934,564 analyze_locks grid_bounds_intersect 845,537 1,190,025 1,299,113 86,424 analyze_locks Gdiplus::Graphics::DrawImage 667,500 1,255,001 1,246,747 47,194 analyze_locks video::next_frame 241,619 279,866 212,356 24,419 analyze_locks pos2grid 195,869 269,137 294,850 18,410 analyze_locks tri_intersect 173,193 271,435 296,786 14,919 analyze_locks shader 172,992 269,044 314,679 21,040 analyze_locks Raypnt 162,623 206,349 204,826 26,100 analyze_locks ...

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804