User Guide

Contents

Microcode Sequencer

Metric Description

This metric represents a fraction of slots during which CPU was retiring uOps fetched by the Microcode Sequencer (MS) ROM. The MS is used for CISC instructions not fully decoded by the default decoders (like repeat move strings), or by microcode assists used to address some modes of operation (like in Floating-Point assists).

Possible Issues

A significant fraction of cycles was spent retiring uOps fetched by the Microcode Sequencer.

Tips

1. Make sure the /arch compiler flags are correct.
2. Check the child Assists metric and, if it is highlighted as an issue, follow the provided recommendations.
Note that this metric value may be highlighted due to MS Switches issue.

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.