User Guide


Thread Concurrency

The number of active threads corresponds to the concurrency level of an application. By comparing the concurrency level with the number of processors,
Intel® VTune™
classifies how an application utilizes the processors in the system. It defines default utilization ranges depending on the number of processor cores and displays the thread concurrency in the
window. You can change the utilization thresholds by dragging the slider in the
Thread concurrency may be higher than CPU utilization if threads are in the runnable state and not consuming CPU time.
defines the Target Concurrency level for your application by default to the number of physical cores.
Utilization Type
Default color
All threads in the application are waiting - no threads are running. There can be only one node in the Thread Concurrency histogram indicating Idle utilization.
Poor utilization. By default, poor utilization is when the number of threads is under 50% of the target concurrency.
Acceptable (OK) utilization. By default, OK utilization is when the number of threads is between 51-85% of the target concurrency.
Ideal utilization. By default, ideal utilization is when the number of threads is between 86-115% of the target concurrency.
Over-utilization. By default, over-utilization is when the number of threads is more than 115% of the target concurrency.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804