Parallel Universe Magazine - Issue 20, February 2015

Submitted: February 01, 2015 Last updated: February 01, 2015
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Detailed Description


  • Letter from the Editor, by James Reinders
  • Your Path to Knights Landing, the Next Generation of Intel® Xeon Phi™ technology
    Prepare your application now for Knights Landing—the highly scalable, next-generation Intel® Xeon Phi™ processor/coprocessor that debuts this year
  • OpenMP* Region Analysis with Intel® VTune™ Amplifer XE
    Intel® VTune™ Amplifer XE can help OpenMP* users more easily understand where to invest their tuning efforts.
  • Walker Molecular Dynamics Laboratory Optimizes Biomedical Software
    Walker Molecular Dynamics Laboratory turned to Intel® VTune™ Amplifer and other Intel® Software Development Products to optimize performance on both Intel® Xeon™ and Xeon Phi™ architecture.
  • Intel® Software Development Products Win HPCwire Awards
    Two Intel® Software Development Products garner top honors from readers and editors alike.
  • Real-World Pearls of Wisdom in High Performance Parallelism
    Leading experts from numerous industries and disciplines whip up delicious code in this “cookbook” of programming for better parallel performance.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804