Parallel Universe Magazine - Issue 37, July 2019

Submitted: July 11, 2019 Last updated: July 11, 2019
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Detailed Description

Contents:

  • Letter from the Editor: Black Holes and High-Performance Computing by Henry A. Gabb, Senior Principal Engineer, Intel Corporation
     
  • Leadership Performance with 2nd-Generation Intel® Xeon® Scalable Processors: New Features and Tools to Maximize Your HPC, AI, and Analytics Applications by Amarpal S. Kapoor, Technical Consulting Engineer; Rama Kishan V. Malladi, Performance Modeling Engineer; and Avinash Karani and Nitya Hariharan, Application Engineers; Intel Corporation
     
  • Using the Latest Performance Analysis Tools to Prepare for Intel® Optane™ DC Persistent Memory: Getting Past Bottlenecks and Storage Issues by Jackson Marusarz, Technical Consulting Engineer, and Kevin O’Leary, Senior Technical Consulting Engineer, Intel Corporation
     
  • Measuring the Impact of NUMA Migrations on Performance: Weighing the Tradeoffs to Maximize Performance by Gurbinder Gill, Graduate Research Assistant, University of Texas at Austin, and Ramesh V. Peri, Senior Principal Engineer, Intel Corporation
     
  • Parallelism in Python: Directing Vectorization with NumExpr*: Boosting Performance for Computing with Arrays and Numerical Expressions by Fabio Baruffa, PhD, Technical Consulting Engineer, Intel Corporation
     
  • Turbo-Charged Open Shading Language on Intel® Xeon® Processors with Intel® Advanced Vector Extensions 512: Up to 2x Faster Full Renders Speed Digital Content Creation by Steena Monteiro, Software Engineer, and Alex M. Wells, Principal Engineer, Intel Corporation
     
  • The Performance Optimization and Productivity (PoP) Project: Pursuing the Never-Ending Quest for Performance by Mike Croucher, Developer Advocate, Numerical Algorithms Group (NAG)
     
  • Seven Ways HPC Software Developers Can Benefit from Intel® Software Investments: Taking Another Look at Intel and HPC Software by James Reinders, Editor Emeritus, The Parallel Universe
     

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804