Parallel Universe Magazine - Issue 39, January 2020

Submitted: January 10, 2020 Last updated: January 10, 2020
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Detailed Description

Contents:

  • Letter from the Editor: Happy New Year and Welcome to the Era of oneAPI by Henry A. Gabb, Senior Principal Engineer, Intel Corporation
     
  • Heterogeneous Programming Using oneAPI: How to Deliver Uncompromised Performance for Diverse Workloads Across Multiple Architectures by Nitya Hariharan, Application Engineer; Rama Kishan Malladi, Performance Modeling Engineer; Amarpal S. Kapoor, Technical Consulting Engineer; Kevin P O’Leary, Technical Consulting Engineer; Intel Corporation
     
  • Accelerating Compression on Intel® FPGAs: How oneAPI is Making FPGAs More Accessible than Ever by Andrei Hagiescu, FPGA Software Engineer, and David Cashman, FPGA Software Engineer, Intel Corporation
     
  • Is Your Game GPU-Bound? It’s Easy to Find Out with a GPU and Device Context Queue Analysis by Oleg Fedyaev, Graphics Software Engineer, Intel Corporation
     
  • New Threading Capabilities in Julia* v1.3: Unleashing the Full Power of Modern CPUs by Jameson Nash and Jeff Bezanson, Julia Computing, Inc., and Kiran Pamnany, Caltech
     
  • Fast Gradient Boosting Tree Inference for Intel® Xeon® Processors: How to Boost Prediction Quality and Performance Using GBT in Intel® Data Analytics Acceleration Library by Kirill Shvets, Machine Learning Engineer, and Egor Smirnov, Software Engineering Manager, Intel Corporation
     
  • K-means Acceleration with 2nd Generation Intel® Xeon® Scalable Processors: Intel’s Hardware and Software Stack for Big Data by Alexander Andreev, Machine Learning Engineer, and Egor Smirnov, Software Engineering Manager, Intel Corporation
     
  • Measuring Graph Analytics Performance: What Is Graph Analytics? And Why Does It Matter? by Henry A. Gabb, Senior Principal Engineer, Intel Corporation, and Editor, The Parallel Universe
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Product and Performance Information

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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804