Parallel Universe Magazine - Issue 40, April 2020

Submitted: April 03, 2020 Last updated: May 07, 2020
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Detailed Description

Contents:

 

  • Letter from the Editor: The Parallel Universe Turns 10 by Henry A. Gabb, Senior Principal Engineer, Intel Corporation
  • GPU-Quicksort: How to Move from OpenCL™ to Data Parallel C++ by Robert Ioffe, Senior Exascale Performance Software Engineer, Intel Corporation
  • Optimizing the Performance of oneAPI Applications: Getting the Most from this Unified, Standards-Based Programming Model by Kevin O’Leary, Software Technical Consulting Engineer, Intel Corporation
  • Speeding Up Monte Carlo Simulation with Intel® oneMKL: Intel® oneAPI Math Kernel Library (Beta) Data Parallel C++ Usage Models by Alina Elizarova and Pavel Dyakov, Math Algorithm Engineers, and Gennady Fedorov, Software Technical Consulting Engineer, Intel Corporation
  • Bringing Accelerated Analytics at Scale to Intel® Architecture: Unifying Data Science with Traditional Analytics on Modern Hardware by Venkat Krishnamurthy, Product Vice President, and Kathryn Vandiver, Senior Director, Platform and Core Engineering, OmniSci
  • A New Approach to Parallel Computing Using Automatic Differentiation: Getting Top Performance on Modern Multicore Systems by Dmitri Goloubentsev, Head of Automatic Adjoint Differentiation, Matlogica, and Evgeny Lakshtanov, Principal Researcher, Department of Mathematics, University of Aveiro, Portugal and Matlogica LTD
  • 8 Rules for Parallel Programming for Multicore: There are Some Consistent Rules that can Help you Solve the Parallelism Challenge and Tap Into the Potential of Multicore by James Reinders, Founding Editor and Editor Emeritus of The Parallel Universe
  • Book Review: The OpenMP Common Core Making OpenMP Simple Again by Ruud van der Pas, Senior Principal Software Engineer, Oracle Corporation

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reservered for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804