Data Parallel C++ (DPC++)

An Open Standards-Based, Cross-Architecture Programming Language

DPC++ = ISO C++ and Khronos SYCL* and community extensions

Cross-Architecture

  • Is an alternative to single-vendor proprietary languages
  • Allows code reuse across hardware targets (CPU, GPU, FPGA) and supports custom tuning for a specific platform
  • Enables each architecture to be programmed and used in isolation, or together

Intel® oneAPI DPC++ Compiler

Companion Intel® oneAPI DPC++ Library

Based on C++ and SYCL* Standards

  • Delivers the productivity benefits of familiar ISO C++
  • Incorporates standard SYCL* to support data parallelism and heterogeneous programming

Open Community Project

  • API extensions are driven by open and cooperative community development
  • Once proven, these enhancements are proposed to the parent specifications (C++ or SYCL) for implementation

Find Out More at oneapi.com

Simplify Coding Across Architectures with DPC++

See how this cross-architecture language simplifies heterogeneous programming across multiple architectures.

Get DPC++ as Part of the Intel® oneAPI Base Toolkit

This foundational set of tools and libraries includes:

  • Familiar tools and languages
  • Advanced analysis and debugging tools
  • Intel® DPC++ Compatibility Tool for CUDA code migration

See All Toolkits

Get It Now

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804