Intel® FPGA Academic Program

Third-Party Training

Learn about Intel FPGAs through curriculum created by university professors, which includes videos, lecture slides, and lab manuals.

 

DPC++ on Intel® DevCloud

Ryan Kastner, professor, University of California San Diego

 

Matrix Multiplication on Intel DevCloud Using DPC++

Ryan Kastner, professor, University of California San Diego

 

Develop Register Transfer Level (RTL) Code for Intel® Programmable Acceleration Card

Greg Stitt, associate professor, University of Florida

 

Learn How to Perform FPGA Timing Analysis

Greg Stitt, associate professor, University of Florida

 

Intel® DevCloud for FPGA with oneAPI and DPC++

Houman Homayoun, associate professor, University of California-Davis

 

Intel DevCloud for FPGA with OpenCL™ Application and DPC++ 

Yan Luo, professor, University of Massachusetts, Lowell

 

Intel DevCloud for FPGA Tutorial

James C. Hoe, professor, Carnegie Mellon University

Featured Events and Workshops

Observe Intel technology demonstrations, attend hands-on workshops, meet with technical experts, and find academic materials, development kits, and more at upcoming conferences.

Product and Performance Information

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Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.