Technical Documentation

Access detailed technical guidance and software mitigations to help you address the latest security advisories.

Applied Filters

CPUID Enumeration and Architectural MSRs

Enumeration of architectural model specific registers (MSRs) on Intel® processors used to help mitigate transient execution attacks

Load Value Injection

Technical deep dive and mitigation instructions for the cross-domain transient execution attack Load Value Injection (LVI)

Snoop-Assisted L1 Data Sampling

Technical documentation and mitigation instructions for the domain bypass transient execution attack Snoop-assisted L1 Data Sampling

Special Register Buffer Data Sampling

Technical deep dive and mitigation instructions for the domain bypass transient execution attack Special Register Buffer Data Sampling (SRBDS / Crosstalk)

Technical deep dive to help developers understand and mitigate certain transient execution attacks in Linux* environments

Indirect Branch Predictor Barrier

How to use the indirect branch predictor barrier (IBPB) mechanism to help mitigate branch target injection transient execution attacks

Single Thread Indirect Branch Predictors

How to use the single thread indirect branch predictor (STIBP) mechanism to help mitigate branch target injection transient execution attacks

Technical deep dive to help developers understand and mitigate transient execution attacks in managed runtimes (JavaScript*, Java*, and C#) and their JIT/AOT compiler frameworks

Technical and mitigations for the transient execution attacks classified as Microarchitectural Data Sampling (Zombieload/Fallout/RIDL)

Intel's overview of speculative execution side channel methods (transient execution attacks) such as Spectre v1 (bounds check bypass) and Meltdown (rogue data cache load)

L1 Terminal Fault

Technical deep dive and mitigation instructions for the domain bypass transient execution attacks classified as L1 Terminal Fault (L1TF/Foreshadow)

Technical deep dive on how to analyze and mitigate potential bounds check bypass vulnerabilities found using static analysis and manual code inspection

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.

2

Features and benefits in Intel® technologies depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No product or component can be absolutely secure. Check with your system manufacturer or retailer or learn more at Intel.com.

3

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors.

Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks.

Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates.

The products and services described may contain defects or errors known as errata which may cause deviations from published specifications. Current characterized errata are available on request.

Intel provides these materials as-is, with no express or implied warranties.