Data Alignment, Padding, and Peel/Remainder Loops


This Intel® Advisor XE 2016 video explains what data alignment is and how it affects vectorization. The causes and effects of peel and remainder loops are examined, along with the interaction of data alignment and multi-dimensional array storage and traversal. The viewer is guided through both using Intel® Advisor XE 2016 to identify alignment-related problems, and solving these problems with alignment and padding. Usage of the Intel® C++ compiler to aid identification is also covered.


Download Video[MP4 44.3MB]


Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804