This webinar teaches you about vectorization: what it is and why you should care about it as a software developer. It will cover terms such as SIMD and vectorization, vector lanes, vector length and discusses performance expectations per core. It will also explores the tradeoff between using compiler autovectorization versus explicit vector programming versus SIMD intrinsics and assembly. It compares explicit vector programming as being similar to explicit parallel programming using OpenMP* parallelism constructs, where the developer takes control and responsibility for vectorizing specified loops. also gives quick examples of the two big ideas in explicit vector programming: omp SIMD loops, and SIMD-enabled functions enabled with the pragma omp declare simd family of constructs.
Intel® Cilk™ Plus – an extension to the C and C++ languages to support data and task parallelism – is described in this webinar. This extension is deprecated in the 2018 release of Intel® Software Development Tools. It will remain in deprecation mode in the Intel® C++ Compiler for an extended period of two years. It is highly recommended that you start migrating to standard parallelization models such as OpenMP* and Intel® Threading Building Blocks (Intel® TBB). For more information see Migrate Your Application to use OpenMP* or Intel® TBB Instead of Intel® Cilk™ Plus.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804