Intel® C++ Compiler 17.0 for macOS* Release Notes for Intel® Parallel Studio XE 2017

Por Jennifer L Jiang,

Publicado:02/16/2016   Última actualización:08/24/2016

This document provides a summary of new and changed product features and includes notes about features and problems not described in the product documentation. 

Please see the licenses included in the distribution as well as the Disclaimer and Legal Information section of these release notes for details. Please see the following links for information on this release of the Intel® C++ Compiler 17.0.

Change History

This section highlights important from the previous product version and changes in product updates.  

Changes in Update 5 (Intel® C++ Compiler 17.0.5)

Changes in Update 4 (Intel® C++ Compiler 17.0.4)

  • Support Xcode* 8.3
  • Fixes for reported problems

No Update 3 Release

  • There was no Update 3 Release

Changes in Update 2 (Intel® C++ Compiler 17.0.2)

Changes in Update 1 (Intel® C++ Compiler 17.0.1)

  • Support macOS* 10.12 and Xcode* 8.0
  • Fixes for reported problems

Changes since Intel® C++ Compiler 16.0 (New in Intel® C++ Compiler 17.0)

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System Requirements

  • A 64-bit Intel®-based Apple* Mac* system host (development for 32-bit is still supported)
  • 2GB RAM minimum, 4GB RAM recommended
  • 3GB free disk space
  • One of the following combinations of mac OS*, Xcode* and the Xcode SDK: 
    • OS X* 10.11, macOS* 10.12
    • Xcode* 7.x, 8.0
  • If doing command line development, the Command Line Tools component of Xcode* is required

Note: Advanced optimization options or very large programs may require additional resources such as memory or disk space.

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How to use the Intel® C++ Compiler

Parallel Studio XE 2017: Getting Started with the Intel® C++  Compiler 17.0 for mac OS* at <install_dir>/documentation_2017/en/compiler_c/ps2017/get_started_mc.htm contains information on how to use the Intel® C++ Compiler from the command line and from Xcode*.

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Product documentation is linked from <install-dir>/documentation_2017/en/compiler_c/ps2017/get_started_mc.htm.  Full documentation for all tool components is available at the Intel® Parallel Studio XE Support page.

Intel-provided debug solutions

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Product samples are now available online at Intel® Software Product Samples and Tutorials

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Technical Support

If you did not register your compiler during installation, please do so at the Intel® Software Development Products Registration Center at Registration entitles you to free technical support, product updates and upgrades for the duration of the support term.

For information about how to find Technical Support, Product Updates, User Forums, FAQs, tips and tricks, and other support information, please visit: 
Note: If your distributor provides technical support for this product, please contact them for support rather than Intel.

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New and Changed Features

The following features are new or significantly enhanced in this version.  For more information on these features, please refer to the documentation.

KNL and Atom targets unsupported on OS* X

KNL and Atom targets unsupported on OS* X. Disabled options on OS* X are the following:


  • -xATOM_SSE4.2
  • -xMIC-AVX512 -xBETA_R3 –xKNL


The same options with –ax will be disabled too. Driver should issue error message in case any of these options are used on OS* X.


Some C++ Compiler Header Files Moved to a Subfolder

A list of compiler header files are moved to a subfolder of existing include folder. There is no change needed to source code that uses the C++ Compiler headers. The new subfolder will be searched during compilation automatically by the compiler driver.

SIMD Data Layout Templates (SDLT) for n-Dimentional Data Array Support for Reducing gather/scatter in SIMD programs


  • For C++ AOS layout, there is no existing language extensions for programmers to annotation the AOS->SOA conversion to minimize gather/scatter generation while vectorizing the SIMD loop/functions.
  • SDLT primitive template V2 supports n-D Containers; it is designed and implemented by using C++11 feature which supports a set of primitives/methods to convert n-D AOS layout to n-D SOA layout.


Support for more new features from OpenMP* 4.0 or later

  • Support for #pragma omp for linear (list [ : linear-step ])
    •  where list is either list or modifier(list)
  • Support for ref, val, and uval modifiers for the linear clause
    •  Examples:  linear(ref(p)), linear(val(i):1), linear(uval(j):1)
  • Support for #pragma omp simd simdlen(n)
  • Support for #pragma omp ordered [simd]
  • Reductions over whole arrays:  int x[n]; #pragma omp simd reduction(+:x)
  • Intel® processor clause extension added to #pragma omp declare simd (proposed; not officially part of OpenMP* 4.5)
  • support for clauses SIMD and NONMONOTONIC modifiers for #pragma omp for schedule :
    • The Intel® C++ Compiler 17.0 include SIMD and NONMONOTONICmodifiers extenstion to schedule clause to enhance user control of how interations of the for loop are divided among threads of team. See the Intel® C++ Compiler User’s Guide for more details.
  • support for array sections as list items in the reduction clause
    • reduction(reduction-identifier:list) If a list item is an array section, it is treated as if reduction clause is applied to each seperate element of the section. The elements of the private array sections will be allocated contiguously

Annotated source listing

  • This feature annotates source files with compiler optimization reports.  The listing format may be specified as either text or html.  The location where the listing appears can be specified as the caller site, the callee site, or both sites. 

New attribute, pragma, and compiler options for code alignment

  • New attribute __attribute__((code_align(n))) is provided to align functions to a power-of-two byte boundry n
  • New pragma #pragma code_align [(n)] is provided to align the subsequent loop head to a power-of-two byte boundry n
  • New compiler option -falign-loops[=n] is provided to align all loops to a power-of-two byte boundry n, or to provide no special alignment for loops -fno-align-loops (the default)

C++14 features supported

The Intel® C++ Compiler 17.0 supports the following features with compiler option /Qstd:c++14 (Windows*) or -std=c++14 (Linux*/macOS*)

  • Support C++14 variable templates (N3651)
  • Support C++14 relaxed (aka extended) constexpr (N3652)
  • Support C++14 sized deallocation (N3663)
  • Please see C++14 Features Supported by Intel® C++ Compiler for an up-to-date listing of all supported features, including comparisons to previous major versions of the compiler.

C11 features supported

The Intel® C++ Compiler 17.0 supports the following features with compiler option /Qstd:c11 (Windows*) or -std=c11 (Linux*/macOS*)

  • Support for all C11 features except C11 keyword _Atomic and __attribute((atomic))
  • Please see C11 Support in Intel® C++ Compiler for an up-to-date listing of all supported features, including comparisons to previous major versions of the compiler.

-ansi-alias compiler option is now the default

  • -ansi-alias is now the compilation default.  This option tells the compiler to assume that the program adheres to ISO C Standard aliasability rules. If your program does not adhere to ANSI aliasability rules, this option may cause the compiler to generate incorrect code. In this case, you can specify -no-ansi-alias to ensure program correctness.

New and Changed Compiler Options  For details on these and all compiler options, see the Compiler Options section of the Intel® C++ Compiler 17.0 User's Guide.

  • -f[no-]align-loops Aligns loops to a power-of-two byte boundary.  
  • -fp-model consistent Enables consistent, reproducible results for different optimization levels or between different processors of the same architecture
  • -qopt-report-annotate Enables the annotated source listing feature and specifies its format
  • -qopt-report-annotate-position[=keyword] Enables the annotated source listing feature and specifies the site where optimization messages appear in the annotated source in inlined cases of loop optimizations.

For a list of deprecated compiler options, see the Compiler Options section of the Intel® C++ Compiler 17.0 User's Guide.

Compiler options starting with –o are deprecated
All compiler options starting with –o are deprecated. These will be replaced by new options preceded with –q. For example, -opt-report should now be –qopt-report. This is to improve compatibility with third-party tools that expect –o<text> to always refer to output filenames.

Change in defualt behatviour of offload DEFAULTMAP

DEFAULTMAP (TOFROM:SCALAR) Local scalars do not offload by default, need “default map: scalar” clause
Causes a scalar variable to be treated as if it appeared in a MAP clause with a map-type of TOFROM . If this clause is not specified, a scalar variable is not mapped; instead it has an implicit attribute of FIRSTPRIVATE . At most one DEFAULTMAPclause can appear in the directive.

Open MP helper thread removed

The openMP monitor thread which was used for book-keeping during program execution has been removed. However, the thread itself is user-visible with Vtune or other tools.

New /qopt-zmm-usage option

You can tune the zmm code generation done by the compiler with the new additional option -qopt-zmm-usage:low|high. The argument value of low provides a smooth transition experience from - Intel® Advanced Vector Extensions 2 (Intel® AVX2) ISA to Intel® Advanced Vector Extensions 512 (Intel® AVX-512) ISA on a Intel® Xeon® Platinum processor (formerly code name Skylake), such as for enterprise applications. Tuning for ZMM instruction use via explicit vector syntax such as #pragma omp simd simdlen() is recommended. The argument value of high is recommended for applications, such as HPC codes, that are bounded by vector computation to achieve more compute per instruction through use of the wider vector operations. The default value is low for Skylake server microarchitecture-family compilation targets and high for Intel® Core™ /Intel® Many Integrated Core Architecture (Intel® MIC Architecture) Intel® AVX-512 combined compilation targets.

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Support Removed

Support for installation on OS X 10.10 or earlier has been removed

Support has been removed for installation and use on these operating system versions. Intel recommends migrating to a newer version of these operating systems.

Known Limitations

Support for OS X* 10.11

  • OS X* 10.11 introduces a new security policy called System Integrity Protection (SIP).  This significantly impacts certain installation scenarios.  Please see OS X* 10.11 Support in Intel® Parallel Studio XE 2016 for important information before attempting to install on OS X* 10.11

Xcode* requires explicit acceptance of Intel bundle at startup for integration to be installed
Beginning with Xcode* 6.3.2, the IDE integration for Intel® Parallel Studio XE does not complete installation until the next time Xcode is started after completing the product installation. When Xcode* is started, you will see a dialog:

The dialog is titled “Unexpected code bundles”, and mentions that Xcode found one or more code bundles not provided by Apple. It then has two buttons, one to “Load Bundles” and one to “Skip Bundles”. “Load Bundles” is required to be clicked to complete the Intel Parallel Studio XE IDE integration. Clicking “Skip Bundles” will cause the Intel tools to not be selectable in Xcode*.

Incompatible with the default libc++ library
Some applications are incompatible with libc++, which is currently enabled as default C++ library in the Intel® C++ Compiler 17.0. For example, the 435.gromacs and 447.dealII from SPEC CPU2006 suite. 
Please use -stdlib=libstdc++ to compile such applications.

Creating new project in Xcode* causes hardcoding of –stdlib=libc++
A new project created in Xcode* causes the hardcoding of a setting for -stdlib=libc++ even for projects that have the Intel® C++ Compiler toolset added. So setting the Intel® C++ Compiler field for the C++ Standard Library setting to libstdc++ is ineffective because libc++ overrides the setting. To change this, do the following:
1.    Select the project row in the navigator area at the left of the workspace window 
2.    In the project editor that appears, select the row that represents the project level of build settings 
3.    You should see the C++ Standard Library setting in bold, indicating that it has a custom value in this project 
4.    Select that row and press the Delete key to remove the customized value 
5.    The C++ Standard Library build property should now have the value Compiler Default
Note that you may have to follow the above steps before adding the Intel® C++ Compiler toolset to your project build rules.

Building Tachyon
For building from Xcode*, you may run into problems building the build_with_tbb configuration with llvm gcc*.  The problem will be that the libtbb.dylib cannot be found.  In this case, go to the Summary->Linked Frameworks and Libraries section, and manually add the libtbb.dylib library from the <install-dir>/tbb/lib directory

Spurious error when a call to a template dependent function is made in a decltype expression in an out-of-line definition for a late-specified return type

  • This is a known regression in Intel® C++ Compiler 16.0 Update 2.  An example is:
  • template <class T>
    struct C {
      int then(int*,int*);
      template <class T2>
      auto then(T2 arg) -> decltype(this->then(&arg, &arg));
    template <class T>
    template <class T2>
    auto C<T>::then(T2 arg) -> decltype(this->then(&arg, &arg)) { return 0; }
    void foo() {
       C<int> f;
    To work around this problem, the definition can be moved inline, or the use of a late-specified return type should be avoided (by explicitly declaring the return type). 

Boost issue with c++14 relaxed constexpr

  • If you are using Boost in -std=c++14 mode and you see compilation errors that seem to be related to the constexpr feature, try defining BOOST_NO_CXX14_CONSTEXPR in boost_1_59_0/boost/config/compiler/gcc.hpp.  To do this you should change these lines (around line 256):
  • #if !defined(__cpp_constexpr) || (__cpp_constexpr < 201304)
    #  define BOOST_NO_CXX14_CONSTEXPR


    //#if !defined(__cpp_constexpr) || (__cpp_constexpr < 201304)
    #  define BOOST_NO_CXX14_CONSTEXPR


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Disclaimer and Legal Information

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804


Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information.

The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to: 

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. Go to:

The Intel® C++ Compiler is provided under Intel's End User License Agreement (EULA). 

Please consult the licenses included in the distribution for details.

Intel, Intel logo, and Cilk are trademarks of Intel Corporation in the U.S. and other countries.

* Other names and brands may be claimed as the property of others.

Copyright © 2016 Intel Corporation. All Rights Reserved.

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For more complete information about compiler optimizations, see our Optimization Notice.

Información sobre productos y desempeño


Los compiladores Intel pueden o no optimizar al mismo nivel para los microprocesadores que no son Intel en optimizaciones que no son exclusivas de los microprocesadores Intel. Estas optimizaciones incluyen los conjuntos de instrucciones SSE2, SSE3 y SSSE3, y otras optimizaciones. Intel no garantiza la disponibilidad, funcionalidad o eficacia de ninguna optimización en microprocesadores que no sean fabricados por Intel. Las optimizaciones dependientes del microprocesador en este producto fueron diseñadas para usarse con microprocesadores Intel. Ciertas optimizaciones no específicas de la microarquitectura Intel se reservan para los microprocesadores Intel. Consulte las guías de referencia y para el usuario para obtener más información acerca de los conjuntos de instrucciones específicos cubiertos por este aviso.

Revisión del aviso n.° 20110804