Roofline Analysis

Visualize actual performance against hardware-imposed performance ceilings (rooflines)—such as memory bandwidth and compute capacity—to provide an ideal road map of potential optimization steps. This analysis highlights loops that have the most headroom for improvement, which allows you to focus on areas that deliver the biggest performance payoff.

In this illustration, loops A and G are good optimization candidates. Loop B has room to improve but will have less impact. Loops E, C, D, and H are poor choices.

A Roofline chart visually depicts application performance (dots) relative to the hardware limitations (lines).

Get loop-specific recommendations for performance improvement.

The Code Analytics tab provides a more detailed view for each loop.

Visually Track Optimization Progress

Review optimization strategies by comparing multiple analysis results on the same chart. See at a glance how the optimization impacted the FLOPS of each loop.

Integrated Roofline (Technical Preview)

The experimental feature examines each loop at different cache levels and arithmetic intensities to provide precise insights into which cache level causes the performance bottlenecks.


Quickly pinpoint memory hierarchy bottlenecks and identify the next optimization steps:

  • Determine which loops are limited by cache
  • Find inefficient access patterns
  • Locate loops that may benefit from vectorization or threading optimizations

Compared to the Cache-Aware Roofline analysis, this feature provides a much more detailed, yet slower, memory traffic analysis.

Learn About Additional Features

Vectorization Optimization

Enable more vector parallelism and improve its efficiency.

Thread Prototyping

Model, tune, and test multiple threading designs.

Build Heterogeneous Algorithms

Create and analyze data flow and dependency computation graphs.

Información sobre productos y desempeño


Los compiladores Intel pueden o no optimizar al mismo nivel para los microprocesadores que no son Intel en optimizaciones que no son exclusivas de los microprocesadores Intel. Estas optimizaciones incluyen los conjuntos de instrucciones SSE2, SSE3 y SSSE3, y otras optimizaciones. Intel no garantiza la disponibilidad, funcionalidad o eficacia de ninguna optimización en microprocesadores que no sean fabricados por Intel. Las optimizaciones dependientes del microprocesador en este producto fueron diseñadas para usarse con microprocesadores Intel. Ciertas optimizaciones no específicas de la microarquitectura Intel se reservan para los microprocesadores Intel. Consulte las guías de referencia y para el usuario para obtener más información acerca de los conjuntos de instrucciones específicos cubiertos por este aviso.

Revisión del aviso n.° 20110804