Measuring L2 -> L1 Fill latency..

Measuring L2 -> L1 Fill latency..

I am trying to measure the L2 -> L1 Fill latency. I'm using PMC 0x48 umask=0x01. This increments each cycle the number of Line Fill Buffers currently allocated, right?If I also tabulate the number of allocations in the L1D (PMC 51 umask=0x01):<# cycles a fill takes from L2 -> L1> =(# active LFB per instruction) / (# L1D allocations made per instruction)Is this correct?perfwise

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Bild des Benutzers Patrick Fay (Intel)

Hello perfwise,

PMC 0x48, umask 0x1 (L1D_PEND_MISS.PENDING) incrementsthe number of outstanding L1D misses every cycle.
The counting probably starts as soon as an L1D miss occurs and before a buffer is allocated for the miss.
The L1Dmiss might require a trip to L2 or L3 or memory. I suspect that it counts bothcacheable and uncacheable memory accesses.
L1D_PEND_MISS contains an unknown mix of types of misses.
So you can't use it to compute an L2->L1 miss latency.
Pat

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