Does Intel Xeon 5345 (Clovertown) & 5560 (Nehalem) has FMA(Fused Multiply & Add) instructions support? I am not able to locate in Intel Xeon documents.
Many HPC scientific applications, it's compute algorithmhas "D = A + (BX C)" operations.
On Itanium systems, it seems FMA are supported.
With AVX, the "Intel Advance Vector Extensions Programming Reference" Chapter#6document (319433-003)speaks about FMA instructionsbeing supported.
Why such a difference of FMA support with Itanium system exist but not with Xeon 5345 & 5560 processors?
Probably, use of FMA instructions call for operation like "D = A + (B X C)" has significant benefit.
Note: With a decoding rate of one instruction per clock cycle, the peak throughput is two floating-point operations per cycle for FMA instructions. For individual add or multiply instructions, it is only one floating-point operation per clock cycle. With above "D = A + (B X C)" combines floating-point adder(FPA) and floating-point multiplier(FPM) in a single hardware block for increased performance.