Intel® Software Development Emulator

Authored by Ady Tal (Intel)

 

Last updated on 27.01.2015 - 03:53

Coarse-grained locks and Transactional Synchronization explained

Authored by James Reinders (Intel)

Coarse-grained locks, and the importance of transactions, are key concepts that motivate why Intel Transactional Synchronization Extensions (TSX) is useful.  I’ll do my best to explain them in this

Last updated on 31.10.2014 - 15:46

Transactional Synchronization in Haswell

Authored by James Reinders (Intel)

We have released details of Intel® Transactional Synchronization Extensions (TSX) for the future multicore processor code-named “Haswell”.

Last updated on 28.06.2013 - 16:29

Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Authored by Roman Dementiev (Intel)

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Last updated on 29.01.2014 - 06:09

Intel(r) Transactional Synchronization Extensions (Intel(r) TSX) profiling with Linux perf

Authored by Andreas Kleen (Intel)

Intel TSX exposes a speculative execution mode to the programmer to improve locking performance.. Tuning speculation requires heavily on a PMU profiler.

Last updated on 29.05.2014 - 09:25

Using HLE and RTM with older compilers with tsx-tools

Authored by Andreas Kleen (Intel)

To use HLE/RTM to improve lock scalability the lock library needs to be enabled.

Last updated on 28.06.2013 - 16:31

Web Resources about Intel® Transactional Synchronization Extensions

Authored by Roman Dementiev (Intel)

Short URL for this page: www.intel.com/software/tsx

Last updated on 28.07.2014 - 03:12

Monitoring Intel® Transactional Synchronization Extensions with Intel® PCM

Authored by Roman Dementiev (Intel)

After applying a new technology (a new processor, a hardware accelerator, a new instruction, etc) besides measuring the immediate performance delta one requires a method to verify that this technol

Last updated on 06.09.2013 - 18:26

TSX fallback paths

Authored by Andreas Kleen (Intel)
The need for fallback paths Last updated on 28.06.2013 - 16:32

Intel Instruction Set Architecture Extensions

Authored by Lexi S (Intel)
Support for Intel Instruction Set Architecture (ISA) Extensions Last updated on 23.10.2013 - 16:53