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Building an Android AOSP module with the Intel® C++ Compiler for Android*

This article describes how to build modules with the Intel C++ Compiler for Android* (ICC) and integrate them into an Android Open Source Project (AOSP) build. A module is typically a shared library or application that will be part of the Android image on the device. Examples are audio/video codecs and multimedia applications.

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  • Управление режимами вычислений с плавающей запятой при использовании Intel® Threading Building Blocks

    В Intel® Threading Building Blocks (Intel® TBB) 4.2, обновление 4, появилась расширенная поддержка управления параметрами вычислений с плавающей запятой. Теперь эти параметры можно указать при вызове большинства параллельных алгоритмов (включая flow::graph). В этом блоге мне бы хотелось рассказать о некоторых особенностях, новых функциях и общей поддержке вычислений с плавающей запятой в Intel TBB. Этот блог не посвящен общей поддержке вычислений с плавающей запятой в ЦП.

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  • Asynchronous Offload - Fortran Code Examples

    This document provides information about asynchronous data transfer, asynchronous computation and memory management without data transfer. This document includes code examples of common usage scenarios. The examples in this article are in Fortran only.

    Introduction

    Two different Fortran directives are used for data transfer and wait for completion.
    The directive for data transfer only, with asynchronous option is:

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  • Intel Parallel Compute Center MIC Training Resources

    Training Resources for the Intel® Many Integrated Core (Intel MIC Architecture) 

     

    Just getting started with The Intel® Xeon PhiTM Coprocessor and need some help getting started OR are you already developing for Phi but looking for more advanced help?  This is the page for you.

    Bootstrapping

    The first step is to join the MIC/Phi community.  All information related is linked from a central web portal. You need to add this site to your Bookmarks:

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  • Intel® System Studio 2015 Beta for Linux Hosts Silent Installation Guide

    Intel® System Studio 2015 Beta for Linux Hosts
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    Contents of this document:

     

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    Disclosure of H/W prefetchers control on some Intel processors

    This article discloses the MSR setting that can be used to control the various h/w prefetchers that are available on Intel processors based on the following microarchitectures: Nehalem, Westmere, Sandy Bridge, Ivy Bridge, Haswell, and Broadwell.

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  • Compile with Open64?

    Hi everybody,

     

    I was wondering if I could compile the library with another compiler, let's say Open64 compiler. 

    As it's been documented, it can be compiled with gcc, clang, icc.

    Is the code potentially able to be compiled with Open64 or not? If it is, can you help me out on 

    where I should change the code in order to be able to build binary codes for new compiler (Open64).

     

     

    Best Regards,

    Millad

     

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