Software Tuning, Performance Optimization & Platform Monitoring

Change in Turbo policy for Xeon E5 v3?

I ran across a change in the behavior of Xeon E5 v3 processors relative to Xeon E5 v1 processors and am confused about several aspects....

  • On Xeon E5 v1 (Sandy Bridge EP) and Xeon E5 v3 (Haswell EP) processors, the maximum non-turbo clock multiplier ratio is contained in bits 15:8 of MSR_PLATFORM_INFO (MSR 0xCE).

Sample code for PCIe Burst Transfer white paper by Intel?

Hi,

 

I bumped into a white paper by intel: http://www.intel.com/content/dam/www/public/us/en/documents/white-papers...

Is there sample code for Linux on Xeon (E5-2600) processor that I can take a look, instead of the general idea outlined in the paper?

For example, basically the steps are:

1. Mark memory Region as WC 

-   Any sample code for this?

2. Burst transfer

Block Matrix Multiplication With Cilk?

I'm trying to tackle the same problem every HPC student gets: multiply matrices faster with as few memory accesses as possible. I've started with the dumb 6-deep nested for-loop block algorithm, but I feel like you can eliminate the 3 innermost loops (or should be able to) with Cilk notation and take advantage of SSE/AVX. This is what I came up with, but I get a compile error on icpc that the array bases are invalid. I've seen tons of cilk examples with variables for array bounds, so I'm REALLY confused as to why this is invalid.

Uncore frequency on Haswell

Can someone explain how the processor controls the uncore frequency. I understand that on Haswell microarchitecture, the uncore is on a separate clock domain than the processor cores. And while the core frequency can be controlled by OS dynamically (when Speedstep is enabled), I am not sure how is the uncore frequency is controlled. Is it possible for OS to control the uncore frequency? I am guessing not. And if not, is it possible to at least get information about the current frequency at which uncore is operating?

uncore event counter reading

Hi everybody,

     I want to read some values of uncore event counters on Intel xeon e5620. Recently I read about PCM and find it really hard to figure out the program logic. And there is no the uncore event I want, like UNC_GQ_ALLOC.READ_TRACKER. I see the pcm-tsx.cpp in PCM and replace the events in it with mine. I just want to see if this is gonna work. And I get some value and am not sure if this is right thing to do.

     I also want to know if there is simpler tools to read these events.

     Thanks.

 

Yang

     

 

 

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