Set the cache associativity for modeling CPU cache behavior during Memory Access Patterns analysis.

GUI Equivalent

Project Properties > Analysis Target > Memory Access Patterns Analysis > Advanced > Cache associativity




<integer> is the number of cache locations where one memory entry can be placed: 1 | 2 | 4 | 8 | 16



Actions Modified

collect=map --enable cache-simulation


1 stands for a direct mapped cache, where a memory entry can occupy only one cache line.


Cache simulation modeling applies to the following analyses:

  • Memory Access Patterns - This basic simulation functionality models accurate memory footprints, miss information, and cache line utilization for a downstream Memory Access Patterns report.

  • Trip Counts and FLOP - This enhanced simulation functionality models multiple levels of cache for a downstream GUI Roofline chart or Roofline interactive HTML report. To enable enhanced simulation functionality in a GUI Roofline chart: Set the ADVIXE-EXPERIMENTAL=int_roofline environment variable.


Run a Memory Access Patterns analysis. Model four-way associative cache with default cache line and cache set size.

$ advixe-cl collect=map --enable-cache-simulation --cachesim-associativity=4 --cachesim-mode=utilization --project-dir=./myAdvisorProj -- ./myApp

See Also

For more complete information about compiler optimizations, see our Optimization Notice.