By Hussam Mousa (Intel), Added
This article is intended to aid software developers in understanding the "big picture" of Intel's recent architecture and processor releases. The "tick tock" model adds predictability to the Intel® architecture roadmap. However within each "tick" and "tock" architecture, multiple processors are launched to support the many diverse computing needs of consumers. While the general Instruction Set Architecture (ISA) and feature set within a given architecture are identical, certain model specific variations occur, and are generally enumerated through CPUID interrogation[1]. The CPUID model number is a convenient way of anticipating the model specific functionality that is available at runtime and subsequently designing the architecture specific parts of software (nevertheless, at runtime, the feature bits in the CPUID should always be verified before use).
The information in the table below is composed from the "Intel® Processor Identification and the CPUID Instruction" and the official Intel product information source.
For identifying a particular processor, please use the Intel® Processor Identification Utility for Microsoft Windows* operating systems or the bootable version for other operating systems[2].
Notes
- The -EP suffix denotes a Dual Processor, meaning this processor is designed to operate in a Dual Processor platform (but can still operate in a Single Processor platform). The -EX suffix denotes a Multi-Processor (MP), meaning this processor is designed to operate in a Multiprocessor platform, but can still operate in a Single or Dual processor platform configuration.
- The Family number is an 8-bit number derived from the processor signature by adding the Extended Family number (bits 27:20) and the Family number (bits 11:8). See section 5.1.2.2 of the "Intel Processor Identification and the CPUID Instruction".
- The Model number is an 8 bit number derived from the processor signature by shifting the Extended Model number (bits 19:16) 4 bits to the left and adding the Model number (bits 7:4) . See section 5.1.2.2 of the "Intel Processor Identification and the CPUID Instruction".
Mainline Architectures and Processors
This table includes the mainline processors on 90nm and later process technology. Please read and understand these important disclaimers prior to use.
|
Process |
Microarchitecture |
Processor |
Processor |
Family |
Model |
Intel® Brand |
Intel® Brand |
|---|---|---|---|---|---|---|---|
|
22 nm |
IvyBridge |
IvyBridge |
0x306Ax |
0x06 |
0x3A |
Core™ i3 |
i3-31xx/32xx-T/U |
|
32 nm |
SandyBridge |
SandyBridge |
0x206Ax |
0x2A |
Core™ i3 |
i3-21xx/23xx-T/M/E/UE |
|
|
SandyBridge-E |
0x206Dx |
0x2D |
Core™ i7 |
I7-3820/3930K |
|||
|
SandyBridge-EN |
Xeon® E5 |
E5-24xx |
|||||
|
SandyBridge-EP |
Xeon® E5 |
E5-16xx, 26xx/L/W |
|||||
|
Westmere |
Arrandale |
0x2065x |
0x25 |
Celeron™ Mobile |
P4xxx, U3xxx |
||
|
Clarksdale |
Pentium™ Desktop |
G69xx |
|||||
|
Gulftown |
0x206Cx |
0x2C |
Core™ i7 |
i7-9xx |
|||
|
Westmere-EP |
Xeon® 3000 |
W36xx |
|||||
|
Westmere-EX |
0x206Fx |
0x2F |
Xeon® E7 |
E7-2xxx, E7-48xx, E7-88xx |
|||
|
45 nm |
Nehalem |
Clarksfield |
0x106Ex |
0x1E |
Core™ i7 |
i7-7xxQM, i7-8xxQM |
|
|
Lynnfield |
Core™ i5 |
i5-7xx, i5-7xxS |
|||||
|
Jasper Forest |
Xeon® 5000 |
LC55xx, EC55xx |
|||||
|
Bloomfield |
0x106Ax |
0x1A |
Core™ i7 Extreme |
i7-965/975 |
|||
|
Nehalem-EP |
Xeon® 5000 |
L55xx, E55xx, X55xx, W55xx |
|||||
|
Nehalem-EX |
0x206Ex |
0x2E |
Xeon® 7000 |
L75xx, E75xx, X75xx |
|||
|
Penryn |
Yorkfield |
0x1067x |
0x17 |
Core™ 2 Quad |
Q9xxx, Q8xxx, !9xxxS |
||
|
Wolfdale |
Celeron™ Desktop |
E3xxx |
|||||
|
Penryn |
Core™ 2 Duo Mobile |
P7xxx, P9xxx, SL9xxx |
|||||
|
Harpertown (DP) |
Xeon® 5000 |
L54xx, E54xx, X54xx |
|||||
|
Dunnington (MP) |
0x106Dx |
0x1D |
Xeon® 7000 |
L74xx, E74xx, Q7xx |
|||
|
65 nm |
Merom |
Clovertown |
0x006Fx |
0x0F |
Xeon® 5000 |
E53xx, L53xx, X53xx |
|
|
Kentsfield |
Xeon® 3000 |
X32xx |
|||||
|
Conroe |
Xeon® 3000 |
30xx |
|||||
|
Merom |
Core™ 2 Duo M |
L7xxx,T5xxx,T7xxx,U7xxx |
|||||
|
Woodcrest |
Xeon® 5000 |
51xx |
|||||
|
Merom |
0x1066x |
0x16 |
Celeron™ Desktop |
4xx |
|||
|
Presler |
Cedar Mill |
0x0066x |
0x0F |
0x06 |
Pentium™ 4 |
3xx, 6xx |
|
|
Presler |
Pentium™ D |
9xx |
|||||
|
90 nm |
Prescott |
Nocona |
0x0063x |
0x03/ |
Xeon® |
|
|
|
Prescott |
Celeron™ D |
3xx |
|||||
|
Dothan |
Dothan |
0x006Dx |
0x06 |
0x0D |
Celeron™ M |
3xx |
Atom™ Architectures and Processors
This table includes the Atom™ processors on 45nm and later process technology. Please read and understand these important disclaimers prior to use.
|
Process |
Microarchitecture |
Processor |
Platform |
Processor |
Family |
Model |
Intel® Brand |
Intel® Brand |
|---|---|---|---|---|---|---|---|---|
|
32 nm |
Atom™ |
Cedarview |
Cedar Trail |
0x0366x |
0x06 |
0x36 |
Atom™ |
N2000 series: N26xx, N28xx |
|
45 nm |
Lincroft |
Oak Trail |
0x0266x |
0x26 |
Z6xx (single core) |
|||
|
Pineview |
Pine Trail |
0x016Cx |
0x1C |
N4xx, D4xx (single core) |
||||
|
Silverthorne |
any |
Z5xx |
Information in this article is intended as a convenient summary of the contents of the "Intel® Processor Identification and the CPUID Instruction" application note and the official Intel® product information source.
In case of discrepancy, the information in the original application note and product information source supersede the contents of this article. (Please notify the author of any such discrepancy).
Please consult Section 2: Usage Guidelines of the "Intel® Processor Identification and the CPUID Instruction" for the proper use of CPUID.
Intel® processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See http://www.intel.com/products/processor_number for details.
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
[1] For an example of interrogating CPUID to verify features please read Using CPUID to Detect the presence of SSE 4.1 and SSE 4.2 Instruction Sets
[2] In Linux*-based operating systems you can type ‘cat /proc/cpuinfo' to obtain the processor family and model numbers (note they are formatted in decimal, while the tables in this article containhexadecimal formatting of these numbers).
Comments (13)
TopPatrick Fay (Intel) said on
Hello,
Here is an update to some of the info in the above table. I took the info from ark.intel.com list of processors, selected the columns: code name and launch date. I wanted to build a list codenames, date first launched, DisplayFamily_DisplayModel (DF_DM), and comment with a little info about the codename.
Starting with codename, I looked on the web (wikipedia and http://instlatx64.atw.hu (which gives me a warning) and other sources) to get Launch date (if ark.intel.com had it blank) and to get the cpuid info. The DF_DM is contructed from the cpuid signature (see the cpuid instruction in the Software Developers Manual (SDM) volume 2). For instance, the cpuid signature of 000306A9h which gives a DF_DM= 06_3AH. (The 3a is the extended model.)
I'm not sure if I ever update this list.
The syntax below is for a python list. The 1st column is the codename. The 2nd column is the earliest launch date for that codename in the format YYYY.Q where YYYY is the year and Q is the quarter. The 3rd col is the DF_DM, the 4th col is the comment.
The 3rd column can have more than 1 DF_DM (comma separated) or be = '?' if I couldn't find the DF_DM.
Pat
g_codename_cpuid = [ ['Arrandale', '2010.1', '06_25H', 'mobile uarch= westmere'], ['Avoton', '2013.3', '06_4DH', 'Atom SoC microserver, silvermont cores'], ['Banias', '2003.2', '06_09H', 'pentium M cpus, based on modified p6 uarch'], ['Bay Trail', '2013.3', '06_37H', 'atom SOC, silvermont cores'], ['Bloomfield', '2008.4', '06_1AH', 'quad core xeon, uarch= nehalem'], ['Briarwood', '2013.2', '?', 'storage SoCs, Intel Atom S1000 series, uarch= saltwell'], ['Broadwell', '2014.3', '06_3DH, 06_47H, 06_4FH, 06_56H', 'broadwell'], ['Cascades', '1999.4', '06_07H', 'pentium iii xeon, coppermine cores'], ['Cedarmill', '2006.1', '0F_06H', 'pentium 4'], ['Cedarview', '2011.3', '06_36H', 'atom saltwell'], ['Centerton', '2012.4', '06_36H', 'atom saltwell'], ['Chevelon', '2007.1', '?', 'Intel(r) IOP342 I/O Processor'], ['Clanton', '2013.4', '05_09H', 'quark'], ['Clarkdale', '2010.1', '06_25H', 'a westmere cpu'], ['Clarksfield', '2009.3', '06_1EH', 'nehalem uarch'], ['Clovertown', '2006.4', '06_0FH', 'uarch= core, Woodcrest, Tigerton, Kentfield, Clovertown'], ['Cloverview', '2013.2', '06_35H', 'Cloverview, saltwell'], ['Conroe', '2006.3', '06_0FH', ''], ['Coppermine', '2000.1', '06_08H', 'pentium iii', ''], ['Cranford', '2005.2', '0F_04H', 'pentium 4, netburst'], ['Crystal Well', '2013.2', '06_46H', 'haswell based'], ['Dempsey', '2006.2', '0F_06H', 'pentium 4'], ["Devil's Canyon", '2014.2', '06_3CH', 'haswell based'], ['Diamondville', '2008.2', '06_1CH', 'bonnell core'], ['Dixon', '1999.1', '06_06H', 'pentium ii'], ['Dothan', '2004.2', '06_0DH', 'pentium M, uarch= p6 variant'], ['Dunnington', '2008.3', '06_1DH', 'quad core xeon, uarch= core'], ['Foster', '2001.1', '0F_01H', 'pentium 4'], ['Gallatin', '2003.2', '0F_02H', 'pentium 4'], ['Gladden', '2012.2', '06_2AH', 'sandy bridge'], ['Gulftown', '2010.1', '06_2CH', 'based on westmere'], ['Harpertown', '2007.4', '06_17H', 'uarch= penryn'], ['Haswell', '2013.2', '06_3CH', 'haswell'], ['Haswell E', '2014.3', '06_3FH', 'haswell e'], ['Irwindale', '2005.1', '0F_07H', 'pentium 4'], ['Ivy Bridge', '2012.2', '06_3AH', 'ivy bridge'], ['Ivy Bridge E', '2013.3', '06_3EH', 'ivy bridge-e, i7-4930K'], ['Ivy Bridge EN', '2014.1', '06_3EH', 'ivy bridge en'], ['Ivy Bridge EP', '2013.3', '06_3EH', 'ivy bridge ep'], ['Jasper Forest', '2010.1', '06_1EH', 'xeon uarch= nehalem'], ['Katmai', '1999.1', '06_07H', 'pentium iii'], ['Kentsfield', '2006.4', '06_0FH', 'uarch= core'], ['Knights Corner', '2012.4', '0B_01H', 'xeon phi'], ['Lincroft', '2010.2', '06_26H', 'atom (bonnell)'], ['Lynnfield', '2009.3', '06_1EH', 'uarch= nehalem'], ['Madison', '2004.2', '1F_03H', 'itanium-2'], ['Mendocino', '1999.1', '06_06H', 'pentium ii'], ['Merom', '2006.3', '06_0FH', 'uarch= core'], ['Merrifield', '2014.1', '06_4AH', 'uarch= silvermont'], ['Montecito', '2007.1', '20_00H', 'uarch= itanium, after madison'], ['Montvale', '2007.4', '20_01H', 'uarch= itanium, after montecito'], ['Moorefield', '2014.2', '06_5AH', 'uarch= silvermont'], ['Nehalem EP', '2009.1', '06_1AH', 'uarch= nehalem'], ['Nehalem EX', '2010.1', '06_2EH', 'uarch= nehalem, beckton'], ['Nocona', '2004.2', '0F_03H', 'pentium 4'], ['Northwood', '2002.1', '0F_02H', 'pentium 4'], ['Paxville', '2005.3', '0F_04H', 'pentium 4'], ['Penryn', '2008.1', '06_17H', 'uarch= penryn'], ['Penwell', '2012.2', '06_27H', 'atom saltwell core'], ['Pine Cove', '2014.3', '?', 'mobile communications chip such as Intel(r) Transcede(tm) T2150'], ['Pineview', '2010.1', '06_1CH', 'atom, bonnell core'], ['Potomac', '2005.2', '0F_04H', 'pentium 4'], ['Poulson', '2012.4', '21_00H', 'itanium, after tukwila'], ['Prescott', '2004.1', '0F_03H', 'pentium 4'], ['Presler', '2006.1', '0F_06H', 'pentium 4'], ['Prestonia', '2002.1', '0F_02H', 'I think the dfdm is right, pentium 4 xeon'], ['Rangeley', '2013.3', '06_4DH', 'communications chip based on avoton with silvermont cores'], ['Sandy Bridge', '2011.1', '06_2AH', 'uarch= sandy bridge'], ['Sandy Bridge E', '2011.4', '06_2DH', 'uarch= sandy bridge'], ['Sandy Bridge EN', '2012.2', '06_2DH', 'uarch= sandy bridge'], ['Sandy Bridge EP', '2012.1', '06_2DH', 'uarch= sandy bridge'], ['Silverthorne', '2008.2', '06_1CH', 'bonnell cores'], ['Smithfield', '2005.1', '0F_04H', 'pentium 4'], ['Sossaman', '2006.1', '06_0EH', 'xeon based on yonah'], ['Stellarton', '2010.4', '06_1CH', 'embedded atom, bonnell cores'], ['Sunrise Lake', '2007.1', '?', 'ioprocessors like IOP348'], ['Tanner', '1999.1', '06_07H', 'pentium iii xeon'], ['Tigerton', '2007.3', '06_0FH', 'dual/quad core xeon, uarch= core'], ['Tolapai', '2008.3', '06_0DH', 'dothan cores'], ['Tualatin', '2001.4', '06_0BH', 'pentium iii'], ['Tukwila', '2010.1', '20_02H', 'itanium, after montvale, before poulson'], ['Tulsa', '2006.3', '0F_06H', 'pentium 4 dual core xeon'], ['Tunnel Creek', '2010.3', '06_26H', 'Intel Atom Z670'], ['Val Vista', '2007.1', '?', 'Intel(r) IOC340 I/O Controller'], ['Westmere EP', '2010.1', '06_2CH', 'DP xeon, uarch= westmere'], ['Westmere EX', '2011.2', '06_2FH', '4socket xeon, uarch= westmere'], ['Willamette', '2000.4', '0F_01H', 'pentium 4'], ['Wolfdale', '2007.4', '06_17H', 'uarch= penryn, shrink of core uarch'], ['Woodcrest', '2006.2', '06_0FH', 'xeon uarch= core'], ['Yonah', '2006.1', '06_0EH', 'based on Banias/Dothan-core Pentium M microarchitecture'], ['Yorkfield', '2007.4', '06_17H', 'quad core xeon, uarch= core'] ]Ron A. said on
Dear Hussam,
This is the most useful article I have found on the topic. Unfortunately, it's 3 years old. Would it be possible to either bring this document up to date or to point me to where I can get a resource where CPU code names and signatures/family & model names are listed?
Thanks much!
Ron
Aviad Sachs (Intel) said on
Can someone provide an updated version of this table for Haswell CPUs also?
Zvi Danovich (Intel) said on
Could you help to understand, how can I identify the CPUID I see in "Intel intrinsics guide" application. I see there the following codes: "0F_03, 0F_02, 06_3C/45/46, 06_3A/3E, 06_2A/2D, 06_25/2C/1A/1E/1F/2E/2F, 06_17/1D, 06_0F" and so on.
I mean, I'd like to know, that, for example, 0F_03 is the Atom/IVB/HSW of specific flavor. Could you point on appropriate table or other source of information ?
constm said on
wrong signature for Atom processors. Family should be 8bit wide.
still nothing on how to recognize i3, i5, i7.
jgross2 said on
Is there any chance to use the complete width of the screen for the table? It's ridiculous to have to scroll horizontally to see all the informatrion while 30% of the width of the screen is completely unused...
Anil Agrawal (Intel) said on
Could you please add the CPUID info for Ivybridge-EP and IvyBridge-EX as well?
Hussam Mousa (Intel) said on
Updated table with newly released Ivybridge i3/i5/i7 processors
Hussam Mousa (Intel) said on
Updated table to include recently released SandyBridge-EP (Xeon E5-[1|2]6xx and i7 3xxx processors, and released Ivybridge processors.
I will update the table as new processors get released.
Michael Fuckner said on
very nive overview- is there a new Version covering the new E5-[1|2]6xx and maybe coming CPUs as well?
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