Intel® Decimal Floating-Point Math Library

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Product Overview

Software implementation of the IEEE 754-2008 Decimal Floating-Point Arithmetic specification, aimed at financial applications, especially in cases where legal requirements make it necessary to use decimal, and not binary floating-point arithmetic (as computation performed with binary floating-point operations may introduce small, but unacceptable errors).

Note: the same package is available for download from http://www.netlib.org/misc/intel/.

Features and Benefits

Ensures conformance with the IEEE Standard 754-2008 for Floating-Point Arithmetic, for decimal floating-point computations. The library implements all the mandatory functions defined for decimal floating-point arithmetic operations in IEEE Standard 754-2008, which is a replacement for the IEEE Standard 754-1985 for Binary Floating-Point Arithmetic.

The current release is 2.0 Update 1, which extends the previous release, 1.0. Release 1.0 of the library implemented all the decimal floating-point operations mandated by the IEEE Standard 754-2008 for Floating-Point Arithmetic. Release 2.0 Update 1 of the library contained in this package also adds transcendental functions (supported in 128-bit, 64-bit, and 32-bit decimal formats), including the ones specified in the technical report on decimal arithmetic ISO/IEC TR 24732 (available from www.iso.org). For operations involving integer operands or results, the library supports signed and unsigned 8-, 16-, 32-, and 64-bit integers.

The library package contains: (1) a copy of the end user license agreement, eula.txt; (2) a README file; (3) a LIBRARY subdirectory with all the source files necessary to build the library, and a README file which specifies how to build the library in Linux*, HP-UX, Windows**, and other operating systems; (4) a TESTS subdirectory with source and input files necessary to build and run a reduced set of tests for the library and a README file which specifies how to build and run these tests; (5) an EXAMPLES subdirectory containing eight examples of calls to library functions with various combinations of build options.

Technical Requirements

This generic package will run on any platform in Linux™, Windows™, HP-UX™, Solaris™, or OS X™.

Primary Technology Contact

To report any issues, please send email to decimalfp@intel.com.

Marius Cornea is a principal engineer in Intel's Software & Solutions Group. He holds a master's degree in Electrical Engineering and a Ph.D. degree in Computer Science from Purdue University in West Lafayette, IN. Since joining Intel in 1994, his work was related to scientific computation, design and development of numerical algorithms, floating-point emulation, exception handling, mathematical libraries, and new floating-point instruction definition and analysis. His e-mail is marius.cornea@intel.com. As a principal maintainer of the Open Source version of the Intel® Decimal Floating-Point Math Library, he would like to thank Jim Thomas and Jon Okada from Hewlett-Packard for testing and finding early in the development stage several issues in some of the library functions, and also Amr Abdel-Fatah from Cairo University for finding one issue later in version 2.0.

For more complete information about compiler optimizations, see our Optimization Notice.

Comments

tryrtyyy's picture

Sory Can't download library.... BAd

's picture

Hi, the download works for me. Please try again - thank you

's picture

I want to test this library.

's picture

Hello Byeongheon,
I was out of the office for the past two weeks, so I only saw your message today. Were you able to download the library?
Thanks,
Marius Cornea

DweeberlyLoom's picture

Sorry I know these may be questions that can't be "officially" answered, but I'm curious and would be happy if you could give hints at unofficial answers :-)

Does Intel plan to fully support the IEEE 754-2008 in future hardware?

Any idea as to when this might happen?

Thanks

's picture

Hi,
Actually, in my personal opinion there will not be a complete hardware implementation of the IEEE Standard 754-2008 any time soon (i.e. for many years to come). The reason is that there are many features in the standard - take correctly rounded transcendentals for example - that are extremely costly to implement in hardware, while very good software solutions exist, or can be found. There is no good justification to have a hardware-only implementation.
Marius Cornea

DweeberlyLoom's picture

Weren't similar things said in 85. I mean if anyone (like a scientist or engineer) need that kind of fp performance they could buy a 8087 ;-)

I would think that decimal and long double (128 bit) would benefit considerably from direct hardware support. Still it would not surprise me if a full hardware implementation would take a couple of years (assuming the changes have been anticipated and are already 'in the pipe').

's picture

The Intel® 8087 implemented everything that was important in the old IEEE standard 754 (even before it became a standard), but left certain operations to software. This will most likely be the case with the new standard too and any future hardware implementations of it (or rather of a subset; as the standard states, it is acceptable to implement it in a combination of HW and SW - no one can realistically expect a hardware-only implementation)

's picture

There are 3 CPU designs that presently implement IEEE 754-2008. The first was the IBM System z9, in microcode. That was a prudent design approach since the z9 started shipping in 2005 (with the DFP-capable microcode somewhat later), well before the standard was officially finalized. A microcode (or what IBM more correctly calls millicode) implementation allowed any post-shipment correction if the draft standard shifted while still providing an orders-of-magnitude performance boost versus a software implementation.

IBM's POWER6 (2007) and System z10 (2008) processors both implement IEEE 754-2008 fully in hardware and in every core. By the time they shipped there was much less uncertainty about the final standard.

If you're a "CPU geek," there's a technical paper describing the z10 hardware implementation here:

http://www.research.ibm.com/journal/abstracts/rd/531/schwarz.html

The z10 DFP implementation is very similar to POWER6. There are 54 DFP instructions implemented in hardware, and they are common to the POWER6 and z10 CPUs (and z9, for that matter). The z10 decimal floating point unit adds support for 13 decimal fixed-point instructions, but these are simply preexisting instructions traditionally important to the z CPU family that were relocated and reimplemented for z10, to improve their performance.

Thomas Willhalm (Intel)'s picture

Please note that the library is also available on netlib (http://www.netlib.org/misc/intel/)

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