Intel® Fortran Compiler 17.0 for macOS* Release Notes for Intel® Parallel Studio XE 2017

This document provides a summary of new and changed product features and includes notes about features and problems not described in the product documentation.

Please see the licenses included in the distribution as well as the Disclaimer and Legal Information section of these release notes for details. Please see the following links for information on this release of the Intel® Fortran Compiler 17.0.

Change History

This section highlights important changes from the previous product version and changes in product updates.

Changes in Update 8 (Intel® Fortran Compiler 17.0.8)

Changes in Update 7 (Intel® Fortran Compiler 17.0.7)

  • New options to mitigate branch target injection
  • Corrections to reported problems

Changes in Update 5 (Intel® Fortran Compiler 17.0.5)

Changes in Update 4 (Intel® Fortran Compiler 17.0.4)

  • Support Xcode* 8.3
  • Corrections to reported problems

No Update 3 Release

  • There was no Update 3 Release

Changes in Update 2 (Intel® Fortran Compiler 17.0.2)

Changes in Update 1 (Intel® Fortran Compiler 17.0.1)

Changes since Intel® Fortran Compiler 16.0 (New in Intel® Fortran Compiler 17.0.0)

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System Requirements

  • A 64-bit Intel®-based Apple* Mac* system host (development for 32-bit is still supported)
  • 2GB RAM minimum, 4GB RAM recommended
  • 4GB free disk space for all features
  • One of the following combinations of macOS*, Xcode* and the Xcode SDK:
    • OS X* 10.11, macOS* 10.12
    • Xcode* 7.x, 8.0, 8.1, 8.2, 8.3
  • If doing command line development, the Command Line Tools component of Xcode* is required

Note: Advanced optimization options or very large programs may require additional resources such as memory or disk space.

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How to install the Intel® Fortran Compiler

If you received the compiler product on DVD insert the DVD. Locate the disk image file (xxx.dmg) on the DVD and double-click. If you received the compiler product as a download, double-click the downloaded file. When the disk image opens, double-click on the xxx.mpkg file to begin installation. Follow the prompts to complete installation.

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How to use the Intel® Fortran Compiler

Parallel Studio XE 2017: Getting Started with the Intel® Fortran Compiler 17.0 for macOS* at <install_dir>/documentation_2017/en/compiler_f/ps2017/get_started_mc.htm contains information on how to use the Intel® Fortran Compiler from the command line and from Xcode*.

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Documentation

Product documentation is linked from <install-dir>/documentation_2017/en/compiler_f/ps2017/get_started_mf.htm.  

User and Reference Guides, What's New and Release Notes, Installation Guides

Refer to the Intel® Parallel Studio XE Support – Documentation for additional User and Reference Guides, What’s New and Release Notes, and Installation Guides.

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Intel-provided debug solutions

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Samples

Product samples are now available online at Intel® Software Product Samples and Tutorials

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Redistributable Libraries

Refer to the Redistributable Libraries for Intel® Parallel Studio XE for more information.

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Technical Support

If you did not register your compiler during installation, please do so at the Intel® Software Development Products Registration Center. Registration entitles you to free technical support, product updates and upgrades for the duration of the support term.

For information about how to find Technical Support, Product Updates, User Forums, FAQs, tips and tricks, and other support information, please visit: http://www.intel.com/software/products/support/

Note: If your distributor provides technical support for this product, please contact them for support rather than Intel.

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Compatibility

In general, object code and modules compiled with earlier versions of Intel Fortran Compiler for Linux* (8.0 and later) may be used in a build with version 17. Exceptions include:

  • Sources that use the CLASS keyword to declare polymorphic variables and which were built with a compiler version earlier than 12.0 must be recompiled.
  • Objects built with the multi-file interprocedural optimization (-ipo) option must be recompiled with the current version.
  • Objects that use the REAL(16), REAL*16, COMPLEX(16) or COMPLEX*32 datatypes and which were compiled with versions earlier than 12.0 must be recompiled.
  • Objects built for the Intel® 64 architecture with a compiler version earlier than 10.0 and that have module variables must be recompiled.  If non-Fortran sources reference these variables, the external names may need to be changed to remove an incorrect leading underscore.
  • Modules that specified an ATTRIBUTES ALIGN directive outside of a derived type and were compiled with versions earlier than 11.0 must be recompiled.  The compiler will notify you if this issue is encountered.
  • Modules that specified an ATTRIBUTES ALIGN directive inside a derived type declaration cannot be used by compilers older than 13.0.1.
  • The implementation of the Fortran 2008 submodules feature required extensive changes to the internal format of binary .mod files. Therefore module files created by the version 16.0 or newer Fortran compiler cannot be used with version 15.0 or older Fortran compilers.

Stack Alignment Change for REAL(16) and COMPLEX(16) Datatypes

In versions prior to 12.0, when a REAL(16) or COMPLEX(16) (REAL*16 or COMPLEX*32) item was passed by value, the stack address was aligned at 4 bytes.  For improved performance, the version 12 and later compilers align such items at 16 bytes and expects received arguments to be aligned on 16-byte boundaries. This change is also compatible with gcc.

This change primarily affects compiler-generated calls to library routines that do computations on REAL(16) values, including intrinsics. If you have code compiled with earlier versions and link it with the version 12 libraries, or have an application linked to the shared version of the Intel run-time libraries, it may give incorrect results.

In order to avoid errors, you must recompile all Fortran sources that use the REAL(16) and COMPLEX(16) datatypes if they were compiled by compiler versions earlier than 12.0.

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New and Changed Features

Some language features may not yet be described in the compiler documentation. Please refer to the Fortran 2008 Standard (PDF) and the proposed draft Fortran 2015 Standard (PDF) if necessary.

Features from Fortran 2008

  • Type statement for intrinsic types
  • Pointer initialization
  • Implied-shape array
  • Extend EXIT statement to more construct names
  • Support BIND(C) in internal procedures

Change of Default in Intrinsic Assignment to Allocatable Arrays (17.0)

In previous releases, the compiler's default for intrinsic assignment to allocatable arrays was to assume that the array being assigned to was already allocated to the same shape as the value. In order to get the Fortran 2003 behavior of automatically (re)allocating the array if the shapes did not match you were required to specify the -assume realloc_lhs compiler option (included in -standard-semantics.)

In version 17.0 of the compiler, the default has changed to match the Fortran 2003 standard so that allocatable arrays are automatically (re)allocated on intrinsic assignment as needed. This may have a small impact on performance. If you want to revert to the older behavior, specify -assume norealloc_lhs or the new -nostandard-realloc-lhs compiler option.

Changes in Behavior of Mixed Logical/Numeric Operations (17.0)

The Fortran standard prohibits assignments and operations that mix logical and numeric (integer/real/complex) data types. As an extension to the standard, Intel Fortran permits this mixing, but the rules for how it works were not well documented and were inconsistently implemented depending on the context.

As of version 17.0, the compiler’s implementation of mixed logical-numeric operations has changed to be consistent and well-specified. However, in some cases the new behavior is different from what previous versions implemented and may change results in programs that assumed that the previous behavior was correct.

The version 17.0 behavior is as follows:

  • If a logical value is used in a numeric context, true values convert to integer -1 or +1, depending on the setting of the “fpscomp logicals” compiler option; false values convert to integer zero. 
  • If a numeric value is used in a logical context, it is first converted to integer if necessary. The setting of the compiler “fpscomp logicals” option determines how the integer value is interpreted. When “nologicals” is in effect, odd values are true and even values are false. When “logicals” is in effect, non-zero values are true and zero values are false.
  • If a numeric value is assigned to a logical variable, the value is converted to .TRUE. or .FALSE. according to the setting of “fpscomp logicals” and the new logical value assigned. In some cases in previous versions, the binary value might have been copied directly without conversion.
  • If a logical value is assigned to a numeric variable, it is first converted to integer as described above and then the normal rules of intrinsic assignment are carried out.

Note that the Intel Fortran compiler default is “fpscomp nologicals”, but that the “standard-semantics” option sets “fpscomp logicals”.

If you want to know if your program is affected by this extension, build with standards warnings enabled (/stand). If you wish to revert to the old behavior, specify -assume old_logical_assign.

Changes in Default Offload Treatment of Local Scalars with OpenMP* 4.5

The addition of support for the OpenMP* 4.5 clause DEFAULTMAP (TOFROM:SCALAR) changed the default treatment of local scalar variables. In the previous release local scalars were offloaded by default. In 17.0, local scalars are not mapped and instead have an implicit attribute of FIRSTPRIVATE. Offload of local scalars in 17.0 requires using DEFAULTMAP (TOFROM:SCALAR). See the Intel® Fortran Compiler User’s Guide for more details.

OpenMP* monitor thread

As of version 17.0.1, the OpenMP* monitor thread (i.e. helper thread) is not created.

Features from OpenMP*

The following directives, clauses and procedures, from OpenMP 4.0 and OpenMP 4.5, are supported by the compiler.

For more information, see the compiler documentation or the link to the OpenMP Specification above.

Directives from OpenMP 4.5:

  • TARGET ENTER DATA
  • TARGET EXIT DATA
  • TASKLOOP

Clauses:

  • DEPEND on OMP TARGET and OMP TARGET UPDATE directives
  • NOWAIT on OMP TARGET and OMP TARGET UPDATE directives
  • SIMDLEN on OMP SIMD directive
  • SIMD on OMP ORDERED directive
  • PROCESSOR(cpuid) on OMP DECLARE SIMD (proc-name) directive

Added processor clause to OMP DECLARE SIMD

The Intel® Fortran Compiler 17.0 includes an extension to OMP DECLARE SIMD which will allow programmers to use YMM/ZMM registers with OpenMP SIMD. The clause PROCESSOR(cpuid) will tell the compiler to create a vector version of a routine for the specified processor. See the Intel® Fortran Compiler User’s Guide for more details.

SIMD and NONMONOTONIC modifiers for !$OMP DO SCHEDULE clause

The Intel® Fortran Compiler 17.0 includes new SIMD and NONMONOTONIC modifiers extensions to OMP DO SCHEDULE clause to enhance user control of how iterations of the DO loop are divided among threads of the team. See the Intel® Fortran Compiler User’s Guide for more details.

Support for taskloop and do across loop as described in the OpenMP* 4.5

The Intel® Fortran Compiler 17.0 adds support for new loop construct for parallelizing for/do loops. “taskloop” is similar to cilkfor loop, enables the dynamic divide-and-conquer loop partitioning under Intel tasking execution model. “doacross” enables the parallelization of loops with loop-carried dependency.

New modifiers for omp declare simd linear clause

The linear clause on omp declare simd declarative directive is extended with new modifiers:

           linear (linear-list [ : linear-step] )
           where linear-list is one of the following:
                     list
                     where modifier (list)
                     modifier is one of the following:
                               ref
                               val
                               uval

  • All list items must be dummy arguments of the function that will be invoked concurrently on each SIMD lane.
  • If no modifier is specified or if the val or uval modifier is specified, the value of each list item on each lane corresponds to the value of the list item upon entry to the function plus the logical number of the lane times linear-step.
  • If the uval modifier is specified, each invocation uses the same storage location for each SIMD lane; this storage location is updated with the final value of the logically last lane.
  • If the ref modifier is specified, the storage location of each list item on each lane corresponds to an array at the storage location upon entry to the function indexed
    by the logical number of the lane times linear-step.

New and Changed Directives

ATTRIBUTES code_align(n)

As of compiler version 17.0, the ATTRIBUTES code_align(n) directive may be specified to request code alignment for a function. 'n' specifies the number of bytes for the minimum alignment boundary. It must be a power of 2 between 1 and 4096, such as 1, 2, 4, 8, 16, 32, 64, 128, and so on. n = 1 does no alignment. n must appear.

Extension to the PROCESSOR(cpuid) clause

The new cpuid keyword "mic_avx512" is for the 2nd generation Intel® Xeon Phi™ processor family with support for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Foundation instructions, Intel® AVX-512 Conflict Detection instructions, Intel® AVX-512 Exponential and Reciprocal instructions, Intel® AVX-512 Prefetch instructions for Intel® processors, and Intel® Advanced Vector Extensions 2 (Intel® AVX2) including the RDSEED and Multi-Precision Add-Carry Instruction Extensions (ADX) instructions. For details about the new cpuid keyword usage, see the Intel® Fortran Compiler User's Guide.

DIR$ VECTOR [NO] MASK_READWRITE

Support for DIR$ VECTOR [NO] MASK_READWRITE clause enables/disables memory speculation by the vectorizer.

MASK_READWRITE | NOMASK READWRITE

        Enables or disables the generation of masked load and store operations within conditional statements.

        The MASK_READWRITE clause directs the compiler to disable memory speculation, causing the generation of masked load and store operations within conditional statements

        The NOMASK_READWRITE clause directs the compiler to enable memory speculation, causing the generation of unmasked loads and stores within conditional statements.

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New and Changed Compiler Options

Please refer to the compiler documentation for details

For a list of deprecated compiler options, see the Compiler Options section of the documentation.

New -f[no-]align-loops[=n] Compiler Option

This new option aligns all loops to a power-of-two boundary

New -qopt-report-annotate [= text | html ] Compiler Option

This option turns on the annotated source listing feature and specifies its format: text or html. Text format is default.

New -qopt-report-annotate-position= [caller | callee | both ] Compiler Option

This option specifies the site where optimization messages appear in the annotated source. Values are: “caller”, “callee” or “both”. Caller is default value.

New -fp-model consistent Compiler Option

When used, the driver will set a combination of options that should provide more consistent FP results.

New -assume [no]old_logical_assign Compiler Option

This option determines the behavior in assignment statements of logical values assigned to numeric variables and numeric values assigned to logical variables. See also Changes in Behavior of Mixed Logical/Numeric Operations.

New -[no]standard-realloc-lhs Compiler Option

This option is an alternate spelling of /assume:[no]realloc-lhs See also Change of Default in Intrinsic Assignment to Allocatable Arrays.

New -qopt-zmm-usage option

You can tune the zmm code generation done by the compiler with the new additional option -qopt-zmm-usage:low|high. The argument value of low provides a smooth transition experience from Intel® Advanced Vector Extensions 2 (Intel® AVX2) ISA to Intel® Advanced Vector Extensions 512 (Intel® AVX-512) ISA on a Skylake server microarchitecture target, such as for enterprise applications. Tuning for ZMM instruction use via explicit vector syntax such as #pragma omp simd simdlen() is recommended. The argument value of high is recommended for applications, such as HPC codes, that are bounded by vector computation to achieve more compute per instruction through use of the wider vector operations. The default value is low for Skylake server microarchitecture-family compilation targets and high for combined compilation targets.

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Support Removed

Support for installation on OS X 10.10 or earlier has been removed

Support has been removed for installation and use on these operating system versions. Intel recommends migrating to a newer version of these operating systems.

Support for Xcode* 6.4 or earlier has been removed

Support has been removed for these Xcode versions. Intel recommends migrating to a newer version of these developer toolsets.

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Known Limitations

Xcode* requires explicit acceptance of Intel bundle at startup for integration to be installed

Beginning with Xcode* 6.3.2, the IDE integration for Intel® Parallel Studio XE does not complete installation until the next time Xcode is started after completing the product installation. When Xcode* is started, you will see a dialog:

The dialog is titled “Unexpected code bundles”, and mentions that Xcode found one or more code bundles not provided by Apple. It then has two buttons, one to “Load Bundles” and one to “Skip Bundles”. “Load Bundles” is required to be clicked to complete the Intel Parallel Studio XE IDE integration. Clicking “Skip Bundles” will cause the Intel tools to not be selectable in Xcode*.

Certain uses of length type parameters in parameterized derived types are not yet fully implemented

The following uses of length type parameters in parameterized derived types (PDTs) are not yet fully implemented:

  • PDT parameter constants with length type parameters
  • %RE and %IM are not yet implemented

OS X* 10.11 Support in Intel® Parallel Studio XE 2016

OS X* 10.11 introduces a new security policy called System Integrity Protection (SIP).  This significantly impacts certain installation scenarios.  Please see OS X* 10.11 Support in Intel® Parallel Studio XE 2016 for important information before attempting to install on OS X* 10.11

Certain uses of OMP THREADPRIVATE with COMMON block name not diagnosed per OpenMP* 4.5 rules

The OpenMP* 4.5 rules states that if a threadprivate directive specifying a common block name appears in one program unit, then such a directive must also appear in every other program unit that contains a COMMON statement specifying the same name. It must appear after the last such COMMON statement in the program unit.  The Intel Fortran compiler does not properly diagnose this.

For example, the following program does not conform to the OpenMP* 4.5 specification and ifort does not diagnose and issue an error for the COMMON statements following the OMP THREADPRIVATE statement according to the rule above.

PROGRAM ex1 
    COMMON /common_blk1/x 
    !$OMP THREADPRIVATE(/common_blk1/) 

    COMMON /common_blk1/y 
    COMMON /common_blk1/z

END PROGRAM

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Fortran 2008 and Fortran 2015 Feature Summary

The Intel® Fortran Compiler also supports many features from the Fortran 2008 standard as well as Features from the proposed draft Fortran 2015 standard.  Additional features will be supported in future releases. Fortran 2008 features supported by the current version include:

  • Maximum array rank has been raised to 31 dimensions (Fortran 2008 specifies 15)
  • Coarrays
  • CODIMENSION attribute
  • SYNC ALL statement
  • SYNC IMAGES statement
  • SYNC MEMORY statement
  • CRITICAL and END CRITICAL statements
  • LOCK and UNLOCK statements
  • ERROR STOP statement
  • ALLOCATE and DEALLOCATE may specify coarrays
  • Intrinsic procedures ATOMIC_DEFINE, ATOMIC_REF, IMAGE_INDEX, LCOBOUND, NUM_IMAGES, THIS_IMAGE, UCOBOUND
  • CONTIGUOUS attribute
  • MOLD keyword in ALLOCATE
  • DO CONCURRENT
  • NEWUNIT keyword in OPEN
  • G0 and G0.d format edit descriptor
  • Unlimited format item repeat count specifier
  • A CONTAINS section may be empty
  • Intrinsic procedures BESSEL_J0, BESSEL_J1, BESSEL_JN, BESSEL_YN, BGE, BGT, BLE, BLT, DSHIFTL, DSHIFTR, ERF, ERFC, ERFC_SCALED, GAMMA, HYPOT, IALL, IANY, IPARITY, IS_CONTIGUOUS, LEADZ, LOG_GAMMA, MASKL, MASKR, MERGE_BITS, NORM2, PARITY, POPCNT, POPPAR, SHIFTA, SHIFTL, SHIFTR, STORAGE_SIZE, TRAILZ,
  • Additions to intrinsic module ISO_FORTRAN_ENV: ATOMIC_INT_KIND, ATOMIC_LOGICAL_KIND, CHARACTER_KINDS, INTEGER_KINDS, INT8, INT16, INT32, INT64, LOCK_TYPE, LOGICAL_KINDS, REAL_KINDS, REAL32, REAL64, REAL128, STAT_LOCKED, STAT_LOCKED_OTHER_IMAGE, STAT_UNLOCKED
  • An OPTIONAL dummy argument that does not have the ALLOCATABLE or POINTER attribute, and which corresponds to an actual argument that: has the ALLOCATABLE attribute and is not allocated, or has the POINTER attribute and is disassociated, or is a reference to the NULL() intrinsic function, is considered not present
  • A dummy argument that is a procedure pointer may be associated with an actual argument that is a valid target for the dummy pointer, or is a reference to the intrinsic function NULL.  If the actual argument is not a pointer, the dummy argument shall have the INTENT(IN) attribute.
  • BLOCK construct
  • intrinsic subroutine EXECUTE_COMMAND_LINE
  • Submodules
  • IMPURE
  • Type statement for intrinsic types
  • Pointer initialization
  • Implied-shape array
  • Extend EXIT statement to more construct names
  • Support BIND(C) in internal procedures

Proposed draft Fortran 2015 features supported by the current version include:

  • Support for all features from “Technical Specification 29113 Further Interoperability with C”, planned for inclusion in Fortran 2015. These include:
    • Assumed type (TYPE(*))
    • Assumed rank (DIMENSION(..))
    • relaxed restrictions on interoperable dummy arguments
    • ISO_Fortran_binding.H C include file for use by C code manipulating “C descriptors” used by Fortran

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Disclaimer and Legal Information

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL(R) PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR.

Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information.

The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to:  http://www.intel.com/design/literature.htm 

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. Go to:

http://www.intel.com/products/processor%5Fnumber/

The Intel® Fortran Compiler is provided under Intel’s End User License Agreement (EULA).

Please consult the licenses included in the distribution for details.

Intel, Intel logo, and Cilk are trademarks of Intel Corporation in the U.S. and other countries.

* Other names and brands may be claimed as the property of others.

Copyright © 2017 Intel Corporation. All Rights Reserved.

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For more complete information about compiler optimizations, see our Optimization Notice.

For more complete information about compiler optimizations, see our Optimization Notice.