UEFI Introduction to PC Architecture

UEFI Curricula

UEFI-Framework Course Contents

Introduction to PC Architecture

Beyond BIOS

UEFI Introduction

UEFI Architecture and Technical Overview

UEFI Application

UEFI Shell

UEFI Boot Manager

UEFI Services

UEFI Drivers

Framework Architecture and Technical Overview

Labs

References

Potential research topics



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Agenda

• Introduction to PC

- History

- General Architecture

- Key components

- Legacy, compatibility, and What they mean

 

Contents

History

PC History

• August 12, 1981 – The IBM PC is introduced

  • –Intel 8088, floppy, cassette interface
  • –Developed in less than 1 year by IBM

• March 3, 1983 – The IBM PC-XT introduced

  • –Intel 8088 @ 4.47 MHz
  • –Hard drive (10 – 100 MB storage)

• 1984 – the IBM PC/AT

  • –Intel 80286 @ 8 MHz

• 1987 – The PS/2

  • – Not a PC class machine,
  • –Based on proprietary Micro Channel Architecture (MCA)

 

PC History (part 2) - Too much change

• The PS/2 was unsuccessful

  • –The shift to a non-open architecture was too great for the industry to accept.

• The Extended Industry Standard Architecture (EISA) committee was formed

  • –EISA was the industries push back on IBM’s move to MCA
  • –EISA was an open architecture
  • –EISA classified the AT architecture and designated it as ISA
  • –EISA introduced several new features to the AT architecture

 

PC history Conclusion

• EISA was only a limited success

  • –In the end, the Industry Standard Architecture was going to remain constant:
  • –Evolution did occur, but at a slower pace, and for every initiative that did succeed, there were at least two that were limited success at best.

• Conclusion:

  • –Even though the original PC standard was created through the development of a single project (in one year) (with good ideas, and not so good ideas), change was resisted.
  • –Many questionable elements in the PC architecture can be traced to vestiges of initiatives of the past 26 years.

General Architecture

Training Overview

• The focus of the remainder of the training will be on the current PC architecture.

•Over the years evolution has been slow, but:

  • –Even EISA opened the door to new technology, like Bus Master Burst DMA
  • –The addition of hardware initiatives like PCI improved technology
  • –The overall improvement of silicon processes (more transistors per Cm2) improved functionality
  • –Technology improvements that could not be ignored (memory size, disk size, processor speed)

• Have resulted in an architecture that has remained constant in some ways, but has grown in others

  • –Consider the differences between the Nieiport 28 and the Mirage

 

Architectural Overview

• Illustration based upon current Shipping technology (Intel 965G with ICH8)

• The focus is upon current developments and futures rather than a complete historical review of the PC technology

Memory Map IA32 PC architecture

 

Key components

• Interrupts

–Processor

–Hardware

–Software

–SMI


• EC (Embedded controller, Keyboard Controller-KBC, System Control Processor - SCP)

–A20

–Fast reset

–Security elements

 

Interrupts

• In real mode, the memory locations from 000h to 3FFh are allocated for Interrupt vectors. (in real mode)

• Standard interrupts are numbered between 0 and FFh,

• Each uses 4 bytes for its vector

• Each vector provides and offset and Segment address (Little Endean) for the interrupt handler.

 

Vector Table example:

     00 01 02 03
00 – 00 00 00 F0              INT 00 – F000:0000
04 – 00 01 00 F0              INT 01 – F000:0100
08 – 00 E0 00 F0              INT 02 – F000:E000
0C – 00 40 00 E0              INT 03 – E000:4000
10 – 00 01 00 F0              INT 04 – F000:0100
14 – 00 01 00 F0              INT 05 – F000:0100
18 – 00 01 00 F0              INT 06 – F000:0100
1C – 00 02 00 E0              INT 07 – E000:0200
20 – 00 40 00 E0              INT 08 – E000:4000
24 – 00 C0 00 F0              INT 09 – F000:C000
28 – 00 20 00 00              INT 0A – 0000:2000
2C – 20 00 10 02              INT 0B – 0210:0020

Processor Interrupts

•00        Divide Error
•01   Debug 
•02   NMI
•03   Breakpoint
•04   Overflow
•05   Bound range exceeded
•06   Invalid Opcode
•07   Device not available 
       – no math coprocessor
•08   Double fault
•09   CoProcessor Segment Overrun
•0A   Invalid TSS
•0B   Segment not present
•0C   Stack Segment Fault
•0D   General Protection
•0E   Page Fault
•0F   Intel Reserved
•10   Floating Point Error
•11   Alignment check
•12   Machine Check
•13   SIMD Floating Point exception
•14    - 1F Intel Reserved

 

Software Interrupts

• The following Interrupts are used in the Legacy BIOS for system support:

–INT 10H – Video support
–INT 13H – Disk services
–INT 14H – Serial services
–INT 15H – Extended services (originally included cassette
services)
–INT 16H – Keyboard services
–INT 17H – Printer services
–INT 18H – Boot Fallback
 (Rom Basic) Support
–INT 19H – Boot services

Hardware Interrupts

PIC 0

PIC 1

SMI

• The SMI interrupt is a late addition to the PC architecture. (Dating back to just before APM – circa 1994).

• The SMI interrupt does not use the interrupt vectors, but rather is works in conjunction with the chipsets to create a special operating envrionment

• SMM code is considered to run in Real mode by default • Specifics of SMM will be covered in additional detail in another session

 

The Embedded Controller

• AKA - The Keyboard Controller (KBC)

• AKA – The System Control Processor (SCP)

• Originally an 8048/8051 based processor used to facilitate I/O communications with keyboards and other system bus control (pre PCI days)

• Usually part of the SIO (System I/O) device in current implementations

• Was used to provide extended capabilities, that became PC standard and considered legacy

• Some of these features were made obsolete by chipset features.

• Ports 60h and 64h

 

EC Functions

• Functions:

  • – Keyboard communications
  • – Reset (replaced by chipset)
  • – A20 control (replaced by chipset)
  • – Password input and control
  • – Backup configuration method (obsolete)
  • – Battery management (Notebook class PCs)
  • – Smbus device

• Often incorporated in SIO devices - off of Low Pin Count (LPC) bus

• SIO devices includes: Floppy Controller, UART Serial Port, Parallel Port, Legacy IDE port

 

Legacy, compatibility, and What they mean

• Compatibility has been informally defined as maintaining “Backward Compatibility” as technology has moved forward.

• Compatibility support has been pressed more on Hardware and Firmware providers than OS and Software vendors. (OS and software vendors can establish a minimum configuration for use of their products)

 

Legacy

• The term Legacy originally referred to the hardware implementations that existed before Intel’s and Microsoft’s configuration imitative (Plug n Play) associated with the Windows 95 product.

• The original ISA PNP technology (again) was not successful (too much change for too little benefit)

• Today Legacy typically means past capability, particularly technologies that precede Windows 95.

 

In UEFI terms

• Compatibility in UEFI refers to providing firmware support for No n-UEFI operating environments.

  • – Non-UEFI aware Operating systems
  • – Non-UEFI Option ROMS (including video ROM)

• The Compatibility Support Module (CSM) of UEFI implementations provides both support for ’legacy’ interfaces, as well as the method of transferring common information (ACPI tables) from UEFI environments to the Compatible environment.

 

Legacy Free?

• The concept of Legacy Free actually ties to the hardware implementation, with the software and BIOS conforming or providing interface pieces to support the non-Legacy hardware configuration.

• Most times a Legacy Free implementation in the PC world, is one that removes the Embedded Controller and/or the SIO.

• With proper use of SMI’s the firmware can provide methods of supporting non-standard hardware through firmware interactions.

 

Expansion Beyond Legacy

• With the advent of the Xeon, and the use of Intel-64 (X64), the move has begun to legacy free considerations.

• Legacy (for over 15 years) has been limited by 32 bits of registers and 32 bits of address space.

• Multi-socketed systems have also broken the Legacy picture (earlier uses of a BMC, then the new APIC method of BSP determination) are well beyond Legacy

• Multi-core processors are another area of non-Legacy support

 

The Technology Changes

• Virtualization

• Root trust security

• AMT/Manageability Engine

• AHCI Sata (over Pata)

• The decline of the SIO

• The rise of USB

 

Summary

• PC/AT represents a slow evolution of a technology that has existed over 25 years.

• The growth pace has been limited by the momentum of the market place and inertia that has resisted sudden and disruptive changes

• Change has occurred (PCI as one example), but it has been an ongoing process

• A PC today represents a device that is 400 times faster, has 1000 times as much storage, and has processing power on a scale unheard of (in a single chip processor) compared to the original PC (at the time of the original PC)

For more complete information about compiler optimizations, see our Optimization Notice.
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