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Required Straps

The boot behavior of the SoC on the module can be influenced by a number of strap signals. The table below shows the configuration of the straps for normal operation. It is the designer’s responsibility to ensure that their design does not impact the default signal levels; that is, the signals must remain in the default states until the PMIC_RESET_N is de-asserted.


SPI Interface

The expansion board routes two SPI interfaces from the module, through a level translator to convert the module 1.8 V logic levels to those required by the breakout board. The breakout board should include appropriate pullup values to the desired voltage, but not to exceed 3.3 V.

Power Up, Power Down, and Reset

The sequences outlined in this section can vary depending on the BIOS version, operating system setting, device state when sequence is initiated and the specific expansion board hosting the compute module. While deemed accurate, material presented is not absolute for all configurations.

Once power on is initiated, the platform resets devices, energizes power supplies on the expansion board and begins to execute the firmware (BIOS) code.

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