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Hardware Block Diagram

The compute module interfaces to the expansion board through twin 100-pin connectors; these connectors are referenced as J2 and J3 on the module and J12 and J13 on the expansion board, respectively.

These module connectors are abstracted to a black-box of the module in the diagram found in Expansion Board Block Diagram. This is done to keep focus on the expansion board physical interfaces.

BIOS Update and Configuration

This section provides an overview of services provided by the BIOS and an outline of the steps to update the BIOS firmware contained within the module memory.

Additionally, there is some limited information for making configuration choices within the BIOS menu system. As the BIOS menu options and menu system structure can change between builds, the information provided will also reference the latest official BIOS build.

Input and Output Interfaces

The Intel® Joule™ module offers a multitude of I/O communication protocols to control signal flow and port out those signals to the macro world. Digital I/O can be directly controlled from the kernel and more easily controlled by the MRAA library. The following communication protocols are available.

Imaging Specifications


The Imaging Processing Unit (IPU) consists of the Processing Subsystem (PS) and the Input Subsystem (IS). The Processing Subsystem is an advanced Image Signal processor (ISP). The Input Subsystem contains the MIPI CSI2 controllers. The IPU interfaces with the CMOS image sensors in the camera module through the IS and processes still and video frames in the PS.

GPIO Level Transitioning

All module GPIO lines function at 1.8 V levels. Intel® Joule™ expansion board provides appropriate level transition, signal conditioning, and protection for devices on—or devices connected to—the expansion board. The default pin usage of J2 and J3 refers to the vantage point of the module. For example the ISH_GPIO_0 signal originates in the module and is delivered to the expansion board; therefore, ISH_GPIO_0 is an output (as configured by BIOS).

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