Technical Article

An Introduction to Intel® Active Management Technology Wireless Connections

With the introduction of wireless-only platforms starting with Intel Active Management Technology (Intel® AMT) 10, it is even more important for an ISV to integrate support for wireless management of AMT devices. This article will address the Intel AMT wireless configuration and describe how to handle the various aspects that are important for a clean integration.
  • Microsoft Windows* (XP, Vista, 7)
  • Microsoft Windows* 10
  • Microsoft Windows* 8.x
  • Business Client
  • Windows*
  • Intel® AMT Software Development Kit
  • Intel® Active Management Technology
  • Device Management
  • Intel® vPro™ Technology
  • Comparison of Projection Methods for Rendering Virtual Reality

    Virtual reality is rapidly gaining popularity, and may soon become a common way of viewing 3D environments. While stereo rendering has been performed on consumer grade graphics processors for a while now, the new wave of virtual reality display devices have two properties that typical applications have not needed to consider before. Pixels no longer appear on regular grids and the displays subtend a wide field-of-view. In this paper, we evaluate several techniques designed to efficiently render for head-mounted displays with such properties. We show that the amount of rendered pixels can be reduced down to 36% without compromising visual fidelity compared to traditional rendering, by rendering multiple optimized sub-projections.
  • Professors
  • Students
  • Game Development
  • Graphics
  • Rendering
  • Recipe: Building and Running MASNUM WAVE for Intel® Xeon Phi™ Processors

    This article provides a recipe for how to obtain, compile, and run an optimized version of MASNUM WAVE (0.2 degree high resolution) workload on Intel® Xeon® processors and Intel® Xeon Phi™ processors.
  • Modern Code
  • KNL
  • Intel® Many Integrated Core Architecture
  • Introducing the Intel® Software Guard Extensions Tutorial Series

    Announcing a new multi-part tutorial series to help software developers integrate Intel® Software Guard Extensions (Intel® SGX) into their applications. The series will guide you through building an Intel SGX application, beginning at application design and running through development, testing, packaging, and deployment. This in-depth look at enabling Intel SGX in a single application provides developers with a hands-on and holistic view of the technology as it is woven into a real-world application.
  • Microsoft Windows* (XP, Vista, 7)
  • Microsoft Windows* 10
  • Microsoft Windows* 8.x
  • Business Client
  • Windows*
  • Software Guard Extensions
  • Why Efficient Use of the Memory Subsystem Is Critical to Performance

    The cores and vector processors on modern multi-core processors are voracious consumers of data. If you do not organize your application to supply data at high-enough bandwidth to the cores, any work you do to vectorize or parallelize your code will be wasted because the cores will stall while waiting for data. The system will look busy, but not fast.

    The following chart, which reflects the numbers for a hypothetical 4-processor system with 18 cores per processor, shows the:

  • Modern Code
  • Training and Deploying Deep Learning Networks with Caffe* Optimized for Intel® Architecture

    Caffe* is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC). Caffe optimized for Intel architecture is currently integrated with the latest release of Intel® Math Kernel Library (Intel® MKL) 2017 optimized for Advanced Vector Extensions (AVX)-2 and AVX-512 instructions which are supported in Intel® Xeon® and Intel® Xeon Phi™ processors (among others). This article describes how to build Caffe optimized for Intel architecture, train deep network models using one or more compute nodes, and deploy networks. In addition, various functionalities of Caffe are explored in detail including how to fine-tune, extract and view features of different models, and use the Caffe Python API.
  • Artificial Intelligence
  • C/C++
  • Python*
  • Beginner
  • Intermediate
  • Caffe
  • deep learning
  • Knights Landing
  • Big Data
  • Optimization
  • Parallel Computing
  • Recipe: Building and Running Parallel Ocean Program (POP) for Intel® Xeon Phi™ Processors

    I. Overview

    This article provides a recipe for how to obtain, compile, and run an optimized version of Parallel Ocean Program (POP) 2.0.1 with a bench01 (0.1 degree high resolution) workload on Intel® Xeon® processors and Intel® Xeon Phi™ processors.

    The source for this version of POP 2.0.1 as well as the bench01 workload can be obtained by contacting Prof. Zhenya Song at songroy@fio.org.cn.

    Bandwidth-Efficient BVH Layout for Incremental Hardware Traversal

    The memory footprint of bounding volume hierarchies (BVHs) can be significantly reduced using incremental encoding, which enables the coarse quantization of bounding volumes. However, this compression alone does not necessarily yield a comparable improvement in memory bandwidth. While the bounding volumes of the BVH nodes can be aggressively quantized, the size of the child node pointers remains a significant overhead. Moreover, as BVH nodes become comparably small to practical cache line sizes, the BVH is cached less efficiently. In this paper we introduce a novel memory layout and node addressing scheme and map it to a system architecture for fixed-function ray traversal. We evaluate this scheme using an architecture simulator and demonstrate a significant reduction in memory bandwidth, compared to previous approaches.
  • Graphics
  • Rendering
  • Subscribe to Technical Article