C-states and P-states are very different

C-states are idle states and P-states are operational states. This difference, though obvious once you know, can be initially confusing.

With the exception of C0, where the CPU is active and busy doing something, a C-state is an idle state. Since an idle CPU isn't doing anything (i.e. any useful work), why not shut it down? No one is going to notice since there's no one using it. (Letting a Penryn run at full bore when idle is like driving in circles very fast; all you're doing is going nowhere quickly.)

A P-state is an operational state, meaning that the core / processor can be doing useful work in any P-state. The most obvious example is when your laptop is using a low power profile and operating on battery. The OS will lower the C0 operating frequency and voltage, i.e. enter a higher P-state. Reducing the operating frequency reduces the speed at which the processor operates, and so the energy usage per second (i.e. power). Reducing the voltage decreases the leakage current from the CPU's transistors, making the processor more energy efficient resulting in further gains. The net result is a significant reduction in the energy usage per second of the processor. On the flip side, an application will take longer to run. This may or may not be a problem from a power perspective. I'll talk about this issue in some depth in a later blog.

C-states and P-states are also orthogonal. This is a fancy mathematical term meaning that each can vary independently of the other. This doesn't mean that in the higher C-states, the voltage doesn't change. It only means that when you resume C0, you go back to the operating frequency and voltage defined by that P-state.

Next time: C-states, C-states and even more C-states
For more complete information about compiler optimizations, see our Optimization Notice.

Comments

's picture

i like it. can you elaborate on what it means to enter a p-state? with the exception of c0, p-states do not exist in the idle c-states; correct?

's picture

Hi Joe,

By entering a P-state, I mean that the processor goes from one voltage, frequency pair to another. So my portable going from P0 to P1 means that the start state is (2333.0 MHz, Va) and the final state is (979.9 MHz, Vb), where Va>Vb.

An interesting detail is how the processor moves from P0 to P1. It doesn't move in one big step but in increments. Remember, the processor has to stay operational, meaning that it must produce correct results. Intelligently moving in small steps is going to let us do this more easily.

As to your question about P-states existing only in C0, the answer that this is generally the case. Hmmm, "generally." This leaves alot to the imagination, doesn't it. I'll talk about this in a more formal article. Yes, I haven't completely dropped this blog. I've been really really busy (aren't we all). I should have a little more time given Q2 is over.

Now some of you might wonder if I'm revealing any Intel proprietary info. I work very hard to insure that I do not. Here's one technique that I use to make sure: I skim the Intel patents. If it's in a patent, it's publically available.

If any of you are really interested in the details some of what I talk about, and can manage to stay awake, take a look at power management patents.

--Taylor

's picture

Hello, Taylor.
I am interested in the exact details of transitioning from a P0 state to a P1 state (for example, also viceversa) on a current multi-core Intel processor:
- how many microseconds does it take
- what happens during the transition (the freq remains the same as for P0)
- is there any extra energy cost consumed.

Could you please at least point me to the right literature for this (I only found these papers: http://download.intel.com/technology/itj/2006/volume10issue02/vol10_art03.pdf and http://download.intel.com/technology/itj/2003/volume07issue02/art03_pentiumm/vol7iss2_art03.pdf ). You mentioned about some power management patents - could you please point me to them.

Thank you,
Alex Susu

's picture

Hi Alex,

General mechanisms (what it is) are often publicly available. Specifics (how we got the silly thing to work) are usually not.

Unless your university / company have applicable non-disclosure agreements in place, I can't go into more specifics.

--Taylor

's picture

Hello, Taylor.
I would be interested to know details about what happens during the transition from one P-state to another.

In case you worry about NDA, we can discuss by email - I can provide also more information on why we are interested in this information .
Thank you.

's picture

Hi,
On my idle DL380G6 machine with dual-X5570 processors, I do this:

cat /proc/acpi/processor/CPU?/power | grep active

and I get the following. Any idea why all CPUs are reporting C0? What can they be doing? I have tried setting the machine to "HP Static High Performance Mode" and also to "HP Dynamic Power Savings Mode" but nothing changes. Can you suggest any reason? Thanks.

active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0
active state: C0

's picture

Interesting. Has there been any updates to this since this was first posted?

Aubrey W. (Intel)'s picture

You can find all of Taylor's blog updates by clicking on his name above the article.

's picture

Does cpu consume power differently while executing instructions and while being idle ?

Why does a CPU consume different quantities of power at a given frequency X Ghz when

1. it is executing an instruction
2. it is not executing any instruction

Should'nt the CPU be consuming same power irrespective of whether it is executing an instruction or not ? (since power is depends on frequency and not the execution of instruction)

Can a CPU be idle (C1) when it is at 2 Ghz frequency ?

Gregory Junker (Intel)'s picture

"Should'nt the CPU be consuming same power irrespective of whether it is executing an instruction or not ? (since power is depends on frequency and not the execution of instruction)"

Power in a CPU is the same power you may have learned about in high-school or college physics: P = VI. Since the voltage stays the same in a given state (say, P0), the only way for power to increase is for current to increase. And the more switching that is going on (the more functional units on the CPU that are active), the more current is required, so the more power is required. Less switching, less power.

This is why power savings are realized by the CPU disabling various parts of itself when they are not in use. Yes, a higher frequency at a given voltage will require higher current to allow the transistors to operate, but in the typical modern CPU, power is more about which transistors are switching and which are not. ;)

Pages