Wellington and Austin: programming lots of cores

A couple of back-to-back opportunities to see great talks about harness lots of cores, and to give talks about programming options and why we do not need to give up on programmability in our quest for high performance.

Wellington this week, Austin next week.

Programming is not easy, and neither is parallel programming. Nevertheless, many people make it seem easy given the right tools and highly programmable machines.

In Wellington at the New Zealand Multicore World Conference, I got to hear a number of thought provoking talks. Aside from great talks on HOW to do it, I love talks about what users accomplish with parallelism. Sebastian Sylwan (WETA CTO) showed what they do with lots of parallelism. Tim Cornwell gave a talk entitled "Data Processing Algorithms: Legacy code will die" to provoke thinking around how today's non-scalable algorithms are outdated and require rethinking. The organizers plan to post the talks, maybe the videos, I'll post a links when that happens and comment then on the HOW papers which were interesting too.

Next week, the "TACC-Intel Highly Parallel Computing Symposium" should be interesting. I do not want to steal thunder from the presenters, so I'll wait to post comments on their talks afterwards. All the talks are investigation results using either the Intel research platform based on our research chip known as "Single-Chip Cloud Computer (SCC)" or on the more recent Knights Ferry prototype systems using the Intel Many Integrated Core (MIC) architecture. I know that the MIC papers will help highlight the enormous benefits of a highly programmable architecture, while exploring the challenges of parallel programming.

The results speak for themselves: parallel programming is hard enough, the solutions should not abandon general programmability.  The good news... we don't have to give up on being generally programmable. The bad news... high performance programming is not going to switch from hard work to being easy.

 
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